ADAU1781 Analog Devices, ADAU1781 Datasheet - Page 2

• Manufacturer Part Number: ADAU1781
• Description: SigmaDSP Low-noise Stereo Audio Codec for Portable Applications
• Manufacturer: Analog Devices

Specifications of ADAU1781

• Instructions/cycles: 1024
• Digital I/o Channels: 8/8
• Analog I/o Channels: 2/2
• Product Description: SigmaDSP low-noise stereo audio codec for portable applications

ADAU1781
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 3
Specifications ..................................................................................... 4
Absolute Maximum Ratings .......................................................... 14
Pin Configuration and Function Descriptions ........................... 15
Typical Performance Characteristics ........................................... 17
System Block Diagrams ................................................................. 20
Theory of Operation ...................................................................... 24
Startup, Initialization, and Power ................................................. 25
Clocking and Sampling Rates ....................................................... 27
Record Signal Path .......................................................................... 30
Record Side Performance Specifications ................................... 4
Output Side Performance Specifications ................................... 6
Power Supply Specifications........................................................ 8
Typical Power Management Measurements ............................. 9
Digital Filters ................................................................................. 9
Digital Input/Output Specifications......................................... 10
Digital Timing Specifications ................................................... 11
Thermal Resistance .................................................................... 14
ESD Caution ................................................................................ 14
Power-Up Sequence ................................................................... 25
Clock Generation and Management ........................................ 26
Enabling Digital Power to Functional Subsystems ................ 26
Setting Up the SigmaDSP Core ................................................ 26
Power Reduction Modes ............................................................ 26
Power-Down Sequence .............................................................. 26
Core Clock ................................................................................... 27
Sampling Rates ............................................................................ 27
PLL................................................................................................ 28
Rev. B | Page 2 of 92
Playback Signal Path ...................................................................... 32
Control Ports ................................................................................... 33
Serial Data Input/Output Ports .................................................... 38
General-Purpose Input/Outputs .................................................. 40
DSP Core ......................................................................................... 41
Program RAM, Parameter RAM, and Data RAM ..................... 44
Applications Information .............................................................. 47
Input Signal Path ........................................................................ 30
Analog-to-Digital Converters ................................................... 31
Output Signal Paths ................................................................... 32
Digital-to-Analog Converters ................................................... 32
Line Outputs ............................................................................... 32
Speaker Output ........................................................................... 32
I
SPI Port ........................................................................................ 36
Memory and Register Access .................................................... 36
TDM Modes ................................................................................ 38
Signal Processing ........................................................................ 41
Architecture ................................................................................ 41
Program Counter ....................................................................... 41
Features ........................................................................................ 41
Numeric Formats ....................................................................... 42
Programming .............................................................................. 42
Program RAM ............................................................................ 44
Parameter RAM .......................................................................... 44
Data RAM ................................................................................... 44
Read/Write Data Formats ......................................................... 44
Software Safeload ....................................................................... 45
Software Slew .............................................................................. 46
Power Supply Bypass Capacitors .............................................. 47
GSM Noise Filter ........................................................................ 47
Grounding ................................................................................... 47
2
C Port ........................................................................................ 33