LPC11U14FHI33 NXP Semiconductors, LPC11U14FHI33 Datasheet - Page 35

The LPC11U14FHI33 is a ARM Cortex-M0 based, low-cost 32-bit MCU, designed for 8/16-bit microcontroller applications, offering performance, low power, simple instruction set and memory addressing together with reduced code size compared to existing 8/

LPC11U14FHI33

Manufacturer Part Number
LPC11U14FHI33
Description
The LPC11U14FHI33 is a ARM Cortex-M0 based, low-cost 32-bit MCU, designed for 8/16-bit microcontroller applications, offering performance, low power, simple instruction set and memory addressing together with reduced code size compared to existing 8/
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
Table 7.
T
[1]
[2]
[5]
[6]
LPC11U1X
Product data sheet
[3]
[4]
[7]
[8]
Symbol
V
C
E
E
E
E
E
R
R
amb
IA
D
L(adj)
O
G
T
ia
vsi
i
The ADC is monotonic, there are no missing codes.
The differential linearity error (E
The integral non-linearity (E
appropriate adjustment of gain and offset errors. See
The offset error (E
ideal curve. See
The gain error (E
error, and the straight line which fits the ideal transfer curve. See
The absolute error (E
ADC and the ideal transfer curve. See
T
Input resistance R
=
amb
40
= 25 C; maximum sampling frequency f
ADC static characteristics
C to +85
Parameter
analog input voltage
analog input capacitance
differential linearity error
integral non-linearity
offset error
gain error
absolute error
voltage source interface
resistance
input resistance
Figure
G
i
O
) is the relative difference in percent between the straight line fitting the actual transfer curve after removing offset
depends on the sampling frequency fs: R
) is the absolute difference between the straight line which fits the actual curve and the straight line which fits the
C unless otherwise specified; ADC frequency 4.5 MHz, V
T
) is the maximum difference between the center of the steps of the actual transfer curve of the non-calibrated
7.
L(adj)
D
) is the peak difference between the center of the steps of the actual and the ideal transfer curve after
) is the difference between the actual step width and the ideal step width. See
Figure
All information provided in this document is subject to legal disclaimers.
Conditions
s
7.
= 400kSamples/s and analog input capacitance C
Rev. 2 — 11 January 2012
Figure
i
7.
= 1 / (f
Figure
s
 C
7.
ia
).
[1][2]
[7][8]
[3]
[4]
[5]
[6]
Min
0
-
-
-
-
-
-
-
-
32-bit ARM Cortex-M0 microcontroller
DD
= 2.5 V to 3.6 V.
Typ
-
-
-
-
-
-
-
-
-
ia
= 1 pF.
LPC11U1x
Max
V
1
1
1.5
3.5
0.6
4
40
2.5
Figure
© NXP B.V. 2012. All rights reserved.
DD
7.
Unit
V
pF
LSB
%
LSB
k
M
LSB
LSB
35 of 69

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