LPC2926_27_29 NXP Semiconductors, LPC2926_27_29 Datasheet - Page 30

The LPC2926/2927/2929 combine an ARM968E-S CPU core with two integrated TCMblocks operating at frequencies of up to 125 MHz, Full-speed USB 2

LPC2926_27_29

Manufacturer Part Number
LPC2926_27_29
Description
The LPC2926/2927/2929 combine an ARM968E-S CPU core with two integrated TCMblocks operating at frequencies of up to 125 MHz, Full-speed USB 2
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
LPC2926_27_29
Product data sheet
6.12.4.1 Pin description
6.13.1 Peripheral subsystem clock description
6.13.2 Watchdog timer
6.13 Peripheral subsystem
The event router module in the LPC2926/2927/2929 is connected to the pins listed below.
The pins are combined with other functions on the port pins of the LPC2926/2927/2929.
Table 15
Table 15.
The peripheral subsystem is clocked by a number of different clocks:
The purpose of the watchdog timer is to reset the ARM9 processor within a reasonable
amount of time if the processor enters an error state. The watchdog generates a system
reset if the user program fails to trigger it correctly within a predetermined amount of time.
Key features:
Symbol
EXTINT[0:7]
CAN0 RXD
CAN1 RXD
I2C0_SCL
I2C1_SCL
LIN0 RXD
LIN1 RXD
SPI0 SDI
SPI1 SDI
SPI2 SDI
UART0 RXD
UART1 RXD
USB_SCL
-
-
-
CLK_SYS_PESS
CLK_UART0/1
CLK_SPI0/1/2
CLK_TMR0/1/2/3
CLK_SAFE see
Internal chip reset if not periodically triggered
Timer counter register runs on always-on safe clock
Optional interrupt generation on watchdog time-out
shows the pins connected to the event router.
Event-router pin connections
All information provided in this document is subject to legal disclaimers.
Direction
I
I
I
I
I
I
I
I
I
I
I
I
I
n/a
n/a
n/a
Section 6.7.2
Rev. 5 — 28 September 2010
Description
external interrupt input 0 to 7
CAN0 receive data input wake-up
CAN1 receive data input wake-up
I2C0 SCL clock input
I2C1 SCL clock input
LIN0 receive data input wake-up
LIN1 receive data input wake-up
SPI0 receive data input
SPI1 receive data input
SPI2 receive data input
UART0 receive data input
UART1 receive data input
USB I
CAN interrupt (internal)
VIC FIQ (internal)
VIC IRQ (internal)
2
ARM9 microcontroller with CAN, LIN, and USB
C-bus serial clock
LPC2926/2927/2929
© NXP B.V. 2010. All rights reserved.
Default polarity
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
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