STM32W108CZ STMicroelectronics, STM32W108CZ Datasheet - Page 122

• Manufacturer Part Number: STM32W108CZ
• Description: High-performance, IEEE 802.15.4 wireless system-on-chip with embedded Flash memory
• Manufacturer: STMicroelectronics

Specifications of STM32W108CZ

• Receive Current (w/ Cpu): 27 mA
• Transmit Current (w/ Cpu, +3 Dbm Tx): 31 mA
• Low Deep Sleep Current, With Retained Ram And Gpio: 400 nA/800 nA with/without sleep timer
• Standard Arm Debug Capabilities: Flash patch & breakpoint; data watchpoint & trace; instrumentation trace macrocell
• Single Voltage Operation: 2.1-3.6 V with internal 1.8 V and 1.25 V regulators

General-purpose timers
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Figure 21. Counter timing diagram, internal clock divided by 1
Figure 22. Counter timing diagram, internal clock divided by 4
Center-aligned mode (up/down counting)
In center-aligned mode, the counter counts from 0 to the auto-reload value (contents of the
TIMx_ARR register) - 1 and generates a counter overflow event, then counts from the
autoreload value down to 1 and generates a counter underflow event. Then it restarts
counting from 0.
In this mode, the direction bit (TIM_DIR in the TIMx_CR1 register) cannot be written. It is
updated by hardware and gives the current direction of the counter.
The update event can be generated at each counter overflow and at each counter
underflow. Setting the TIM_UG bit in the TIMx_EGR register by software or by using the
slave mode controller also generates an update event. In this case, the both the counter and
the prescalar's counter restart counting from 0.
Software can disable the update event by setting the TIM_UDIS bit in the TIMx_CR1
register. This avoids updating the shadow registers while writing new values in the buffer
registers. Then no update event occurs until the TIM_UDIS bit has been written to 0.
However, the counter continues counting up and down, based on the current auto-reload
value.
STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
Doc ID 16252 Rev 13