STM32W108CZ STMicroelectronics, STM32W108CZ Datasheet - Page 55

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STM32W108CZ

Manufacturer Part Number
STM32W108CZ
Description
High-performance, IEEE 802.15.4 wireless system-on-chip with embedded Flash memory
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32W108CZ

Receive Current (w/ Cpu)
27 mA
Transmit Current (w/ Cpu, +3 Dbm Tx)
31 mA
Low Deep Sleep Current, With Retained Ram And Gpio
400 nA/800 nA with/without sleep timer
Standard Arm Debug Capabilities
Flash patch & breakpoint; data watchpoint & trace; instrumentation trace macrocell
Single Voltage Operation
2.1-3.6 V with internal 1.8 V and 1.25 V regulators

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STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
6.6
Clearing both CSYSPWRUPREQ and CDBGPWRUPREQ allows the STM32W108 to
achieve a true deep sleep state (deep sleep 1 or 2). Both of these signals also operate as
wake sources, so that when a debugger connects to the STM32W108 and begins accessing
the chip, the STM32W108 automatically comes out of deep sleep. When the debugger
initiates access while the STM32W108 is in deep sleep, the SWJ intelligently holds off the
debugger for a brief period of time until the STM32W108 is properly powered and ready.
For more information regarding the SWJ and the interaction of debuggers with deep sleep,
contact ST support for Application Notes and ARM® CoreSight documentation.
Security accelerator
The STM32W108 contains a hardware AES encryption engine accessible from the ARM®
Cortex-M3. NIST-based CCM, CCM*, CBC-MAC, and CTR modes are implemented in
hardware. These modes are described in the IEEE 802.15.4-2003 specification, with the
exception of CCM*, which is described in the ZigBee Security Services Specification 1.0.
Doc ID 16252 Rev 13
System modules
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