STM32W108CZ STMicroelectronics, STM32W108CZ Datasheet - Page 172
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STM32W108CZ
Manufacturer Part Number
STM32W108CZ
Description
High-performance, IEEE 802.15.4 wireless system-on-chip with embedded Flash memory
Manufacturer
STMicroelectronics
Datasheet
1.STM32W108CC.pdf
(232 pages)
Specifications of STM32W108CZ
Receive Current (w/ Cpu)
27 mA
Transmit Current (w/ Cpu, +3 Dbm Tx)
31 mA
Low Deep Sleep Current, With Retained Ram And Gpio
400 nA/800 nA with/without sleep timer
Standard Arm Debug Capabilities
Flash patch & breakpoint; data watchpoint & trace; instrumentation trace macrocell
Single Voltage Operation
2.1-3.6 V with internal 1.8 V and 1.25 V regulators
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Analog-to-digital converter
11
Figure 51. ADC block diagram
1. For the STM32W108CC and STM32108CZ devices, the input range selection block is not present on the N Input.
Note:
Note:
172/232
Analog-to-digital converter
The STM32W108 analog-to-digital converter (ADC) is a first-order sigma-delta converter
with the following features:
●
●
●
●
●
●
●
Figure 51
While the ADC Module supports both single-ended and differential inputs, the ADC input
stage always operates in differential mode. Single-ended conversions are performed by
connecting one of the differential inputs to VREF/2 while fully differential operation uses two
external inputs.
This note only applies to STM32W108xB. In high voltage mode, input buffers (with 0.25 gain
only) may experience long term drift of its input offset voltage that affects ADC accuracy. In
these cases, only the 1.2V input range mode of the ADC should be used. If measurement of
signals >1.2V is required, then external attenuation should be added.
For STM32W108CC and STM32108CZ, high voltage mode is supported only in single
mode. It is also required by the software to periodically set to 1 bit ADC_HVSELN in the
register ADC_CFG.
Resolution of up to 12 bits
Sample times as fast as 5.33 µs (188 kHz)
Differential and single-ended conversions from six external and four internal sources
Two voltage ranges (differential): -VREF to +VREF, and –VDD_PADS to +VDD_PADS
Choice of internal or external VREF: internal VREF may be output
Digital offset and gain correction
Dedicated DMA channel with one-shot and continuous operating modes
shows the basic ADC structure.
STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
Doc ID 16252 Rev 13
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