STM32W108CZ STMicroelectronics, STM32W108CZ Datasheet - Page 228
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STM32W108CZ
Manufacturer Part Number
STM32W108CZ
Description
High-performance, IEEE 802.15.4 wireless system-on-chip with embedded Flash memory
Manufacturer
STMicroelectronics
Datasheet
1.STM32W108CC.pdf
(232 pages)
Specifications of STM32W108CZ
Receive Current (w/ Cpu)
27 mA
Transmit Current (w/ Cpu, +3 Dbm Tx)
31 mA
Low Deep Sleep Current, With Retained Ram And Gpio
400 nA/800 nA with/without sleep timer
Standard Arm Debug Capabilities
Flash patch & breakpoint; data watchpoint & trace; instrumentation trace macrocell
Single Voltage Operation
2.1-3.6 V with internal 1.8 V and 1.25 V regulators
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Revision history
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Revision history
Table 159. Document revision history
16-Sep-2009
21-Sep-2009
24-Nov-2009
22-Sep-2010
09-Dec-2010
30-Sep-2011
05-Dec-2011
01-Mar-2010
29-Mar-2011
20-Oct-2010
27-Jul-2011
Date
Revision
10
11
1
2
3
4
5
6
7
8
9
STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
Initial release.
Modified document status to Preliminary Data.
Major revision of
Serial interfaces on page
Added
Section 4: Embedded memory on page 27
voltage regulator on page
Updated
Added notes to
configuration on page 90
on page
Updated parameters and values in
conditions on page
Added
page 201
control and status registers on page
Added Total Tx current values for 24 MHz in
characteristics on page 213
consumption on page
Updated
sampling
disabled and 6 MHz
Added
enabled and 6MHz
Modified system wakeup time from deep sleep in
system electrical
Updated datasheet status to full datasheet.
Added INT_SLEEPTMRFLAG, INT_SLEEPTMRCFG,
SLEEPTMR_CLKEN.
Update for STM32W108CC and STM32W108CZ
Added
package
Updated document title
Section 4.1: Flash
cycles.
Section 10.3.7: Timer x capture/compare enable register
(TIMx_CCER): updated names of bits 12, 8, 4, and 0.
Figure 51: ADC block diagram
Section 11.1.4: Offset/gain
the offset/gain corrected value; added HV buffer offset calculation for
STM32W108CC and STM32W108CZ devices.
Table 109: Typical ADC input
Doc ID 16252 Rev 13
Section 2: Documentation conventions on page
Section 13.1: STM32W108 JTAG TAP connection on
Table 144: ADC module key parameters for input buffer
Note 2
172.
Section 11.1.8: Calibration on page
Table 142: ADC module key parameters for 1 MHz
outline.
and
and
Table 143: ADC module key parameters for input buffer
Section 6.4.4: Slow timers (Watchdog and Sleeptimer)
in
Software reset on page
Section Figure 60.: UFQFPN48 7x7 mm pitch 0.5
Section 1.2: Overview on page 12
characteristics.
memory: replaced 1000 with 10k write/erase
204.
sampling.
sampling.
216.
and
76.
56.
correction: Added third bullet point about
and updated
Changes
configurations: added footnote 1.
Section 11: Analog-to-digital converter
: added footnote1.
Table 135: General operating
45.
37,
Figure 56: Transmit power
and
Section 9.6.1: Setup and
Table 150: DC electrical
178.
Section 7: Integrated
Table 152: Non-RF
and
14,
Section 9:
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