TMP91xy16FG Toshiba, TMP91xy16FG Datasheet - Page 203
TMP91xy16FG
Manufacturer Part Number
TMP91xy16FG
Description
Manufacturer
Toshiba
Datasheet
1.TMP91XY16FG.pdf
(282 pages)
Specifications of TMP91xy16FG
Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
1
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
-
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
31
Power Supply Voltage(v)
2.7 to 3.6
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Note: Number in above table shows f
Read Bus
Width
Word
Byte
1.00 equal 37 ns.
Above table doesn’t show to guarantee the time, it shows outline. For details, look for AC TIMING at
after page.
Type
A
B
C
A
B
C
Mode
Write
Nibble
Nibble
Nibble
Nibble
Nibble
Nibble
Byte
Byte
Byte
Byte
Byte
Byte
Bit
Bit
Bit
Bit
Bit
Bit
D1BSCP pulse width
D1BSCP pin
D7 to D0 pin
Set Up Time
Figure 3.13.9 Definition of Specification
A23 to A0
Data setup time
Table 3.13.5 Timing Table Each Type
D1SCP cycle
RD
0.5x
0.5x
0.5x
1.0x
1.0x
1.0x
1.0x
1.0x
1.0x
0.5x
0.5x
1.0x
1.0x
1.0x
1.0x
pin
FPH
State/cycle
clock cycle, for example, in case of 27 MHz frequency Xin-Xout,
Address
91C016-201
Hold Time
No support. Please use byte read mode
No support. Please use byte read mode
No support. Please use byte read mode
1.0x
1.0x
1.0x
0.5x
0.5x
0.5x
2.5x
1.5x
1.0x
1.0x
1.0x
0.5x
0.5x
1.5x
1.5x
Data hold time
Pulse Width
D1BSCP
1.5x
1.0x
1.0x
2.0x
1.0x
1.0x
1.5x
2.5x
1.0x
1.0x
1.0x
1.0x
1.0x
1.5x
2.5x
Address + 1
D1BSCP
Cycle
4.0x
2.0x
2.0x
4.0x
2.0x
2.0x
6.0x
5.0x
2.0x
2.0x
2.0x
2.0x
2.0x
3.0x
5.0x
State/Cycle
18.0x
18.0x
10.0x
20.0x
10.0x
10.0x
20.0x
4.0x
6.0x
4.0x
6.0x
6.0x
6.0x
6.0x
8.0x
TMP91C016
2008-02-20
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