TMP91xy16FG Toshiba, TMP91xy16FG Datasheet - Page 96
TMP91xy16FG
Manufacturer Part Number
TMP91xy16FG
Description
Manufacturer
Toshiba
Datasheet
1.TMP91XY16FG.pdf
(282 pages)
Specifications of TMP91xy16FG
Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
1
I2c/sio Bus Channels
-
(s)dram Controller
1
Adc 10-bit Channel
-
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
31
Power Supply Voltage(v)
2.7 to 3.6
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3.7
8-Bit Timers (TMRA)
channels and can operate in any of the following 4 operating modes.
In addition, a timer flip-flop and a prescaler are provided for each pair of channels.
(Special-function registers).
operate in the same manner; hence only the operation of TMRA01 is explained here.
The TMP91C016 features 4 channel (TMRA0 to TMRA3) built-in 8-bit timers.
These timers are paired into 2 modules: TMRA01 and TMRA23. Each module consists of 2
Figure 3.7.1 to Figure 3.7.2 show block diagrams for TMRA01 and TMRA23.
Each channel consists of an 8-bit up counter, an 8-bit comparator and an 8-bit timer register.
The operation mode and timer flip-flops are controlled by 5 bytes registers SFRs
Each of the two modules (TMRA01 and TMRA23) can be operated independently. All modules
The contents of this chapter are as follows.
•
•
•
•
3.7.1
3.7.2
3.7.3
3.7.4
External
pin
SFR
(Address)
8-bit interval timer mode
16-bit interval timer mode
8-bit programmable square wave pulse generation output mode (PPG: Variable duty
cycle with variable period)
8-bit pulse width modulation output mode (PWM: Variable duty cycle with constant
period)
(1) 8-bit timer mode
(2) 16-bit timer mode
(3) 8-bit PPG (Programmable pulse generation) output mode
(4) 8-bit PWM (Pulse width modulation) output mode
(5) Settings for each mode
(6) MELODY/ALARM circuit supply mode
Block Diagrams
Operation of Each Circuit
SFRs
Operation in Each Mode
Input pin for external clock
Output pin for timer
flip-flop
Timer run register
Timer register
Timer mode register
Timer flip-flop control
register
Table 3.7.1 Registers and Pins for Each Module
Module
91C016-94
TA01MOD (0104H)
TA01RUN (0100H)
TA1FFCR (0105H)
(Shared with P70)
TA0REG (0102H)
TA1REG (0103H)
TMRA01
TA1OUT
None
(LCDC, MLD source
TA23MOD (010CH)
TA3FFCR (010DH)
TA23RUN (0108H)
TA2REG (010AH)
TA3REG (010BH)
No external
TMRA23
TA3OUT
terminal
clk use)
None
TMP91C016
2008-02-20
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