MSC8101PG Motorola / Freescale Semiconductor, MSC8101PG Datasheet - Page 38
MSC8101PG
Manufacturer Part Number
MSC8101PG
Description
MSC8101PG 16-Bit Digital Signal Processor Quick Reference
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
1.MSC8101PG.pdf
(162 pages)
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Dedicated Pin Assignments by Port
30
Notes:
PD31
PD30
PD29
PD19
PD18
PD17
PD16
PD7
Pin
multiplexed polling
multiplexed polling
1. MPHY address pins 3 and 4 (master mode) can come from FCC2, depending on CMXUAR programming.
2. MPHY address pins 0–4 (slave mode) can come from FCC2, depending on CMXUAR programming. See
3. x = The port signal number.
FCC1: TxAddr4
FCC1: RxAddr4
MPHY, master,
MPHY, master,
BRG2: BRGO
FCC1: TxPrty
SCC1: TENA
PDIRD[x] = 1
SCC1: TXD
SCC1: RTS
See the CPM Multiplexing Programming model information in the MSC8101 Reference Manual.
the CPM Multiplexing Programming model information in the MSC8101 Reference Manual.
UTOPIA 8
(Output)
Ethernet
1
1
Table 3-6. Port D Dedicated Pin Assignment (PPARD = 1)
PSORD[x] = 0
MPHY, master, direct
MPHY, master, direct
multiplexed polling
multiplexed polling
MSC8101 Programmer’s Quick Reference
FCC1: TxAddr4
FCC1: RxAddr4
FCC1: RxClav3
FCC1: TxClav3
SMC1: SMSYN
FCC1: RxPrty
PDIRD[x] = 0
MPHY, slave,
MPHY, slave,
SCC1: RXD
UTOPIA 8
(Input)
polling
polling
2
2
2
2
Default
Input
GND
GND
GND
GND
GND
GND
GND
Pin Function
multiplexed polling
multiplexed polling
FCC1: RxAddr3
FCC1: TxAddr3
DMA: DRACK1
DMA: DRACK2
MPHY, master,
MPHY, master,
BRG1: BRGO
PDIRD[x] = 1
(Output)
1
1
PSORD = 1
MPHY, master, direct
MPHY, master, direct
(Input Unless Inout
multiplexed polling
multiplexed polling
FCC1: RxClav2
FCC1: RxAddr3
FCC1: TxAddr3
FCC1: TxClav2
DMA: DONE1
DMA: DONE2
MPHY, slave,
MPHY, slave,
PDIRD[x] = 0
Is Specified)
SPI: MOSI
SPI: MISO
SPI: CLK
SPI: SEL
polling
polling
Inout
Inout
Inout
Inout
Inout
2
2
2
2
Default
Input
MOSI
GND
GND
GND
V
V
DD
DD
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