MSC8101PG Motorola / Freescale Semiconductor, MSC8101PG Datasheet - Page 56

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MSC8101PG

Manufacturer Part Number
MSC8101PG
Description
MSC8101PG 16-Bit Digital Signal Processor Quick Reference
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
48
11A04
11A08
11A0A
11A0C
11A0E
11A10
11A12
11A14
11A16
11A17
11A18–11A1F
11A20
11A24
11A28
11A2A
11A2C
11A2E
11A30
11A32
11A34
11A36
11A37
11A38–11A3F
11A40
11A44
11A48
11A4A
11A4C
11A4E
Internal Address
GSMR_H1
PSMR1
Reserved
TODR1
DSR1
SCCE1
Reserved
SCCM1
Reserved
SCCS1
Reserved
GSMR_L2
GSMR_H2
PSMR2
Reserved
TODR2
DSR2
SCCE2
Reserved
SCCM2
Reserved
SCCS2
Reserved
GSMR_L3
GSMR_H3
PSMR3
Reserved
TODR3
DSR3
Table 5-5. PowerPC 60x Bus Memory Map (Continued)
Mnemonic
MSC8101 Programmer’s Quick Reference
SCC1 General Mode Register (high)
SCC1 Protocol-Specific Mode Register
— Leave unchanged for future compatibility
SCC1 Transmit-on-Demand Register
SCC1 Data Synchronization Register
SCC1 Event Register
— Leave unchanged for future compatibility
SCC1 Mask Register
— Leave unchanged for future compatibility
SCC1 Status Register
— Leave unchanged for future compatibility
SCC2 General Mode Register (low)
SCC2 General Mode Register (high)
SCC2 Protocol-Specific Mode Register
— Leave unchanged for future compatibility
SCC2 Transmit-on-Demand Register
SCC2 Data Synchronization Register
SCC2 Event Register
— Leave unchanged for future compatibility
SCC2 Mask Register
— Leave unchanged for future compatibility
SCC2 Status Register
— Leave unchanged for future compatibility
SCC3 General Mode Register (low)
SCC3 General Mode Register (high)
SCC3 Protocol-Specific Mode Register
— Leave unchanged for future compatibility
SCC3 Transmit-on-Demand Register
SCC3 Data Synchronization Register
SCC2
SCC3
Name
32 bits
16 bits
16 bits
16 bits
16 bits
16 bits
16 bits
16 bits
8 bits
8 bits
8 bytes
32 bits
32 bits
16 bits
16 bits
16 bits
16 bits
16 bits
16 bits
16 bits
8 bits
8 bits
8 bytes
32 bits
32 bits
16 bits
16 bits
16 bits
16 bits
Size

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