HM-65642 Intersil Corporation, HM-65642 Datasheet
HM-65642
Related parts for HM-65642
HM-65642 Summary of contents
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... Intersil 80C86 and 80C88 micropro- cessors is simplified by the convenient output enable (G) input. The HM-65642/883 is a full CMOS RAM which utilizes an array of six transistor (6T) memory cells for the most stable and lowest possible standby supply current over the full mili- tary temperature range ...
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... Operating Conditions Operating Voltage Range . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V Operating Temperature Range . . . . . . . . . . . . . . . . -55 Input Low Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +0.8V TABLE 1. HM-65642/883 DC ELECTRICAL PERFORMANCE SPECIFICATIONS Device Guaranteed and 100% Tested PARAMETER SYMBOL High Level Output VOH 1 VCC = 4 ...
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... TABLE 1. HM-65642/883 DC ELECTRICAL PERFORMANCE SPECIFICATIONS (Continued) Device Guaranteed and 100% Tested PARAMETER SYMBOL Data Retention ICCDR HM-65642B/883 Supply Current VCC = 2.0V VCC -0. GND +0.3V HM-65642/883 VCC = 2.0V VCC -0. GND +0.3V HM-65642C/883 VCC = 2.0V VCC -0. GND +0.3V Functional Test FT VCC = 4.5V (Note 3) NOTES: 1. All voltages referenced to device GND. ...
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... TABLE 2. HM-65642/883 AC ELECTRICAL PERFORMANCE SPECIFICATIONS (Continued) (NOTES 1, 2) PARAMETERS SYMBOL CONDITIONS Data Hold Time TWHDX VCC = 4.5V and 5.5V TE1HDX VCC = 4.5V and 5.5V TE2LDX VCC = 4.5V and 5.5V NOTES: 1. All voltages referenced to device GND measurements assume transition time 5ns; input levels = 0.0V to 3.0V; timing reference levels = 1.5V; output load = 1TTL equivalent load and CL 50pF, for CL > ...
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... HM-65642/883 TABLE 4. APPLICABLE SUBGROUPS CONFORMANCE GROUPS GROUPS METHOD Interim Test 1 100%/5004 Interim Test 100%/5004 PDA 100%/5004 Final Test 1 100%/5004 Group A Samples/5005 Groups C and D Samples/5005 SUBGROUPS - 8A, 8B, 10 8A, 8B 6-224 ...
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... G TGLQV TGLQX Q HM-65642/883 1. The RAM must be kept disabled during data retention. This is ac- complished by holding the E2 pin between -0.3V and GND. 2. During power-up and power-down transitions, E2 must be held between -0.3V and 10% of VCC. 3. The RAM can begin operating one TAVAX after VCC reaches the minimum operating voltage of 4 ...
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... FIGURE 5. WRITE CYCLE II: EARLY WRITE - CONTROLLED BY E1 xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx A xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx TAVE2H xxxxx xxxxx W xxxxx xxxxx xxxxx E1 xxxxx E2 D FIGURE 6. WRITE CYCLE III: EARLY WRITE - CONTROLLED BY E2 HM-65642/883 TAVAX TWLWH TDVWH TWLQZ FIGURE 4. WRITE CYCLE I: LATE WRITE TAVAX TE1LE1H TDVE1H TAVAX TE2HE2L TDVE2L 6-226 TWHAX xxxxxxxxxxxxxxx xxxxxxxxxxxxxxx ...
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... DQ7 DQ0 DQ6 DQ5 17 F2 DQ4 16 F2 DQ3 15 F2 NOTES 100kHz 10 0.01 F Min. VCC = 5.5V 0.5V. VIH = 4.5V 10%. VIL = -0.2V to +0.4V. 6-227 IOL HM-65642/883 CLCC TOP VIEW A11 A10 ...
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... No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com HM-65642/883 GLASSIVATION: Type: SiO 2 Thickness: 8k WORST CASE CURRENT DENSITY A/cm HM-65642/883 VCC W GND DQ3 DQ4 DQ5 6-228 Å Å 1k ...