HM-65642 Intersil Corporation, HM-65642 Datasheet - Page 6

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HM-65642

Manufacturer Part Number
HM-65642
Description
8k X 8 Asynchronous Cmos Static Ram
Manufacturer
Intersil Corporation
Datasheet
Low Voltage Data Retention
Intersil CMOS RAMs are designed with battery backup in
mind. Data Retention voltage and supply current are guaran-
teed over the operating temperature range. The following
rules ensure data retention:
Read Cycles
VCCOR
E1
E2
G
Q
A
GND
VCC
4.5V
Q
A
VIH
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E2
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TAVQV
TE1LQX
TE2HQX
ADDRESS 1
TAVAX
TE2HQV
TE1LQV
TGLQV
TGLQX
TAVQV
FIGURE 2. READ CYCLE I: W, E2 HIGH; G, E1 LOW
FIGURE 3. READ CYCLE II: W HIGH
FIGURE 1. DATA RETENTION
HM-65642/883
DATA 1
DATA RETENTION MODE
TAXQX
6-225
TAVAX
1. The RAM must be kept disabled during data retention. This is ac-
2. During power-up and power-down transitions, E2 must be held
3. The RAM can begin operating one TAVAX after VCC reaches the
ADDRESS 2
complished by holding the E2 pin between -0.3V and GND.
between -0.3V and 10% of VCC.
minimum operating voltage of 4.5V.
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DATA 2
TAVAX
TE1HQZ
TE2LQZ
TGHQZ
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