DSP56721 Freescale Semiconductor, Inc, DSP56721 Datasheet - Page 20

no-image

DSP56721

Manufacturer Part Number
DSP56721
Description
Dsp56721 Multi-core Audio Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
20
Notes:
No.
36
37
38
39
40
41
42
43
1.
2.
3.
4.
5.
First SCK sampling edge to HREQ output
deassertion
Last SCK sampling edge to HREQ output
not deasserted (CPHA = 1)
SS deassertion to HREQ output not
deasserted (CPHA = 0)
SS deassertion pulse width (CPHA = 0)
HREQ in assertion to first SCK edge
HREQ in deassertion to last SCK sampling
edge (HREQ in set-up time) (CPHA = 1)
First SCK edge to HREQ in not asserted
(HREQ in hold time)
HREQ assertion width
V
Periodically sampled, not 100% tested.
All times assume noise free inputs.
All times assume internal clock frequency of 200 MHz.
SHI_1 specs match those of SHI.
CORE_VDD
Characteristics
Table 11. Serial Host Interface SPI Protocol Timing Parameters (Continued)
= 1.0± 0.10 V; T
Symphony
1,3,4
J
TM
= -40°C to 125°C; C
DSP56720 / DSP56721 Multi-Core Audio Processors, Rev. 3
L
Master
Master
Master
Master
Mode
Slave
Slave
Slave
Slave
= 50 pF.
Very Narrow
Very Narrow
Very Narrow 0.5 x T
Filter Mode
Bypassed
Bypassed
Bypassed
Narrow
Narrow
Narrow
Wide
Wide
Wide
0.5 x T
0.5 x T
0.5 x T
3.0 x T
4.0 x T
3.0 x T
3.0 x T
3.0 x T
4.0 x T
4.0 x T
4.0 x T
3.0 x T
Expression
2.0 x T
3.0 x T
SPICC
T
SPICC
T
SPICC
T
SPICC
T
C
C
C
C
C
C
+ 5
+ 5
+ 5
+ 5
C
C
C
C
C
C
C
+ 130
+ 130
+ 30
+ 40
+ 80
+ 30
+ 40
+ 80
+ 30
C
+ 3.0 x
+ 3.0 x
+ 3.0 x
+ 3.0 x
C
Freescale Semiconductor
100.0
150.0
111.5
206.5
50.0
60.0
45.0
10.0
49.5
49.5
Min
145
45
55
95
15
0
0
Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

Related parts for DSP56721