DSP56721 Freescale Semiconductor, Inc, DSP56721 Datasheet - Page 27
DSP56721
Manufacturer Part Number
DSP56721
Description
Dsp56721 Multi-core Audio Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.DSP56721.pdf
(56 pages)
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2.2.4
See
Freescale Semiconductor
No.
62
63
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Table 13
Clock cycle
Clock high period
Clock low period
SCKR rising edge to FSR out (bl) high
SCKR rising edge to FSR out (bl) low
SCKR rising edge to FSR out (wr) high
SCKR rising edge to FSR out (wr) low
SCKR rising edge to FSR out (wl) high
SCKR rising edge to FSR out (wl) low
Data in setup time before SCKR (SCK in synchronous
mode) falling edge
Data in hold time after SCKR falling edge
FSR input (bl, wr) high before SCKR falling edge
FSR input (wl) high before SCKR falling edge
FSR input hold time after SCKR falling edge
Flags input setup before SCKR falling edge
Flags input hold time after SCKR falling edge
SCKT rising edge to FST out (bl) high
SCKT rising edge to FST out (bl) low
• For internal clock
• For external clock
• For internal clock
• For external clock
For ESAI timing parameters and
Enhanced Serial Audio Interface (ESAI) Timing
5
Characteristics
Symphony
Table 13. Enhanced Serial Audio Interface Timing Parameters
TM
DSP56720 / DSP56721 Multi-Core Audio Processors, Rev. 3
1, 3, 4
6
6
Figure
20,
6
Figure
Symbol
21,
t
SSICC
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Figure
Expression
22, and
4 × T c
4 × T c
2 × T c
2 × T c
2 × T c
2 × T c
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Figure 23
5
20.0
20.0
12.0
19.0
12.0
12.0
19.0
Min
3.5
9.0
2.0
2.0
2.5
8.5
0.0
6.0
0.0
10
10
10
10
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
for timing diagrams.
Max
17.0
17.0
19.0
19.0
16.0
17.0
18.0
20.0
10.0
7.0
7.0
9.0
9.0
6.0
7.0
8.0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Condition
i ck a
i ck a
i ck a
i ck a
i ck a
i ck a
i ck a
i ck a
i ck a
i ck s
i ck s
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
x ck
i ck
i ck
i ck
i ck
i ck
i ck
—
—
—
—
2
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
27
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