GS1560A Gennum Corporation, GS1560A Datasheet - Page 42

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GS1560A

Manufacturer Part Number
GS1560A
Description
Reclocking Deserializer For HD-SDI, Sd-sdi & Dvb-asi With Loop Thru Cable Driver. 3.3/1.8V Supply.
Manufacturer
Gennum Corporation
Datasheet

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Table 11: Host Interface Description for Error Status Register
GENNUM CORPORATION
ERROR_STATUS
Address: 001h
REGISTER
NAME
15-11
BIT
10
9
8
7
6
5
4
3
2
1
0
AP_CRC_ERR
VD_STD_ERR
FF_CRC_ERR
CCRC_ERR
LNUM_ERR
LOCK_ERR
YCRC_ERR
CCS_ERR
YCS_ERR
SAV_ERR
EAV_ERR
NAME
Video Standard Error Flag. Set HIGH when a mismatch between
the received SMPTE352M packets and the calculated video
standard occurs.
Full Field CRC Error Flag. Set HIGH in SD mode when a Full
Field (FF) CRC mismatch has been detected in Field 1 or 2.
Active Picture CRC Error Flag. Set HIGH in SD mode when an
Active Picture (AP) CRC mismatch has been detected in Field 1
or 2.
Lock Error Flag. Set HIGH whenever the LOCK pin is LOW
(indicating the device not correctly locked).
Chroma Checksum Error Flag. Set HIGH when ancillary data
packet checksum error has been detected in the C channel.
Luma Checksum Error Flag. Set HIGH when ancillary data
packet checksum error has been detected in the Y channel.
Chroma CRC Error Flag. Set HIGH in HD mode when a
mismatch occurs between the calculated and received CRC
values in the C channel.
Luma CRC Error Flag. Set HIGH in HD mode when a mismatch
occurs between the calculated and received CRC values in the
Y channel.
Line Number Error Flag. Set HIGH in HD mode when a
mismatch occurs between the calculated and received line
numbers.
Start of Active Video Error Flag. Set HIGH when TRS errors are
detected in either 8-bit or 10-bit TRS words. In HD mode only Y
channel TRS codes will be checked. FW_EN/DIS must be set
HIGH.
End of Active Video Error Flag. Set HIGH when TRS errors are
detected in either 8-bit or 10-bit TRS words. In HD mode only Y
channel TRS codes will be checked. FW_EN/DIS must be set
HIGH.
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DESCRIPTION
Not Used
R/W
R
R
R
R
R
R
R
R
R
R
R
DEFAULT
27360-1
0
0
0
0
0
0
0
0
0
0
0

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