DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 288

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DF2211NP24V

Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
8.6.2
PADR stores output data for the port A pins.
Note: * Reserved in the H8S/2212 Group. If this bit is read, an undefined value will be read. This bit
8.6.3
PORTA indicates the pin states of the port A.
Notes: 1. Determined by the states of pins PA3 to PA0.
Rev.7.00 Dec. 24, 2008 Page 234 of 698
REJ09B0074-0700
Bit
7 to
4
3
2
1
0
Bit
7 to
4
3
2
1
0
Bit Name Initial Value
PA3DR
PA2DR
PA1DR
PA0DR*
Bit Name Initial Value
PA3
PA2
PA1
PA0*
cannot be modified.
2. Reserved in the H8S/2212 Group. If this bit is read, an undefined value will be read.
Port A Data Register (PADR)
Port A Register (PORTA)
2
Undefined
0
0
0
0
Undefined
⎯*
⎯*
⎯*
⎯*
1
1
1
1
R/W
R/W
R/W
R/W
R
R
R
R
R/W
R/W
Description
Reserved
These bits are undefined and cannot be modified.
Store output data for a pin that functions as a general
output port.
Description
Reserved
These bits are undefined.
If the port A is read while PADDR bits are set to 1, the
PADR value is read. If the port A is read while PADDR
bits are cleared to 0, the pin states are read.

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