DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 79
DF2211NP24V
Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
1.DF2211NP24V.pdf
(756 pages)
- Current page: 79 of 756
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Type
Bus control
16-bit timer
pulse unit
(TPU)
Realtime
clock (RTC)
Symbol
HWR
LWR
WAIT
TCLKA
TCLKB
TCLKC
TCLKD
TIOCA0
TIOCB0
TIOCC0
TIOCD0
TIOCA1
TIOCB1
TIOCA2
TIOCB2
TMOW
TFP-100G,
TFP-100GV
93
94
95
4
5
7
9
2
3
4
5
6
7
8
9
21
BP-112,
BP-112V
B5
C5
A4
C2
C1
D2
E4
B1
D4
C2
C1
D3
D2
D1
E4
G4
Pin No.
FP-64E,
FP-64EV,
TNP-64B,
TNP-64BV
⎯
⎯
⎯
3
4
6
8
1
2
3
4
5
6
7
8
12
I/O
Output
Output
Input
Input
I/O
I/O
I/O
Output
Rev.7.00 Dec. 24, 2008 Page 25 of 698
Function
A strobe signal that writes to
external address space and
indicates that the upper half (D15 to
D8) of the data bus is enabled.
(Supported only by the H8S/2218
Group)
A strobe signal that writes to
external address space and
indicates that the lower half (D7 to
D0) of the data bus is enabled.
(Supported only by the H8S/2218
Group)
Requests insertion of a wait state in
the bus cycle when accessing
external 3-state address space.
(Supported only by the H8S/2218
Group)
TPU external clock input pins
The TGRA_0 to TGRD_0 input
capture input/output compare
output/PWM output pins
The TGRA_1 and TGRB_1 input
capture input/output compare
output/PWM output pins
The TGRA_2 and TGRB_2 input
capture input/output compare
output/PWM output pins
The divided clock output pin
REJ09B0074-0700
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