DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 386
DF2211NP24V
Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
1.DF2211NP24V.pdf
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Contention between TCNT Write and Clear Operations: If the counter clear signal is generated
in the T
performed. Figure 9.45 shows the timing in this case.
Contention between TCNT Write and Increment Operations: If incrementing occurs in the T
state of a TCNT write cycle, the TCNT write takes precedence and TCNT is not incremented.
Figure 9.46 shows the timing in this case.
Rev.7.00 Dec. 24, 2008 Page 332 of 698
REJ09B0074-0700
2
state of a TCNT write cycle, TCNT clearing takes precedence and the TCNT write is not
φ
Address
Write signal
Counter clear
signal
TCNT
Figure 9.46 Contention between TCNT Write and Increment Operations
φ
Address
Write signal
TCNT input
clock
TCNT
Figure 9.45 Contention between TCNT Write and Clear Operations
TCNT write data
N
TCNT write cycle
N
TCNT write cycle
TCNT address
TCNT address
T
T
1
1
T
T
2
2
H'0000
M
2
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