DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 390

• Manufacturer Part Number: DF2211NP24V
• Description: H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
• Manufacturer: Renesas Technology / Hitachi Semiconductor

Contention between Buffer Register Write and Input Capture: If the input capture signal is
generated in the T
the write to the buffer register is not performed. Figure 9.51 shows the timing in this case.
Contention between Overflow/Underflow and Counter Clearing: If overflow/underflow and
counter clearing occur simultaneously, the TCFV/TCFU flag in TSR is not set and TCNT clearing
takes precedence. Figure 9.52 shows the operation timing when a TGR compare match is specified
as the clearing source, and H'FFFF is set in TGR.
Rev.7.00 Dec. 24, 2008 Page 336 of 698
REJ09B0074-0700
Figure 9.51 Contention between Buffer Register Write and Input Capture
φ
Address
Write signal
Input capture
signal
TCNT
TGR
Buffer
register
Figure 9.52 Contention between Overflow and Counter Clearing
2
TCNT input
clock
TCNT
Counter
clearing signal
TGF flag
TCFV flag
state of a buffer register write cycle, the buffer operation takes precedence and
φ
H'FFFF
Prohibited
Buffer register write cycle
M
Buffer register
T
1
address
N
T
2
H'0000
M
N