DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 47
DF2211NP24V
Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
1.DF2211NP24V.pdf
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Section 1
Table 1.1
Table 1.2
Section 2
Table 2.1
Table 2.2
Table 2.3
Table 2.4
Table 2.5
Table 2.6
Table 2.7
Table 2.8
Table 2.9
Table 2.10
Table 2.11
Table 2.12
Table 2.13
Section 3
Table 3.1
Table 3.2
Section 4
Table 4.1
Table 4.2
Table 4.3
Table 4.4
Table 4.5
Section 5
Table 5.1
Table 5.2
Table 5.3
Table 5.4
Table 5.5
Table 5.6
Pin Functions in Each Operating Mode for H8S/2218 Group................................ 15
Pin Functions in Each Operating Mode for H8S/2212 Group................................ 18
Instruction Classification........................................................................................ 46
Operation Notation ................................................................................................. 47
Data Transfer Instructions ...................................................................................... 48
Arithmetic Operations Instructions ........................................................................ 49
Logic Operations Instructions ................................................................................ 50
Shift Instructions .................................................................................................... 51
Bit Manipulation Instructions................................................................................. 52
Branch Instructions................................................................................................. 54
System Control Instruction..................................................................................... 55
Block Data Transfer Instruction ............................................................................. 56
Addressing Modes.................................................................................................. 58
Absolute Address Access Ranges .......................................................................... 60
Effective Address Calculation................................................................................ 62
MCU Operating Mode Selection............................................................................ 71
Pin Functions in Each Operating Mode.................................................................. 76
Exception Types and Priority ................................................................................. 81
Exception Handling Vector Table .......................................................................... 82
Reset Types ............................................................................................................ 84
Status of CCR and EXR after Trace Exception Handling ...................................... 87
Status of CCR and EXR after Trap Instruction Exception Handling ..................... 88
Pin Configuration ................................................................................................... 93
Interrupt Sources, Vector Addresses, and Interrupt Priorities ................................ 101
Interrupt Control Modes......................................................................................... 103
Interrupt Response Times....................................................................................... 108
Number of States in Interrupt Handling Routine Execution Statuses..................... 109
Interrupt Source Selection and Clearing Control.................................................... 111
Overview
CPU
MCU Operating Modes
Exception Handling
Interrupt Controller
Tables
Rev.7.00 Dec. 24, 2008 Page xlvii of liv
REJ09B0074-0700
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