DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 401
DF2211NP24V
Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
1.DF2211NP24V.pdf
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Reading from TCNT, TCSR, and RSTCSR: TCNT, TCSR, and RSTCSR are read by using the
same method as for the general registers. TCSR, TCNT, and RSTCSR are allocated in addresses
H'FF74, H'FF75, and H'FF77 respectively.
10.5.2
If a timer counter clock pulse is generated during the T
takes priority and the timer counter is not incremented. Figure 10.8 shows this operation.
Contention between Timer Counter (TCNT) Write and Increment
Figure 10.7 Format of Data Written to RSTCSR (Example of WDT0)
Write to RSTE, RSTS bits
φ
Address
Internal write
signal
TCNT input
clock
TCNT
Writing 0 to WOVF bit
Address: H'FF76
Address: H'FF76
Figure 10.8 Contention between TCNT Write and Increment
15
15
TCNT write cycle
T 1
H'A5
H'5A
N
T 2
2
state of a TCNT write cycle, the write
Rev.7.00 Dec. 24, 2008 Page 347 of 698
8 7
8 7
Counter write data
Write data
H'00
M
REJ09B0074-0700
0
0
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