L64704 LSI Logic Corporation, L64704 Datasheet - Page 124

• Manufacturer Part Number: L64704
• Description: Satellite Decoder Technical Manual 5/97
• Manufacturer: LSI Logic Corporation

The loop filter output is provided with two
modulated complementary
signal pairs, CAR_VCO1P and CAR_VCO1N, and AR_VCO2P and
CAR_VCO2N. These signals connect to the external active integrator,
that completes the loop filter chain
(Figure
5.8). One of the complemen-
tary pairs is selected while the other is 3-stated, depending on the set-
tings of the CAR_VCO1N/P and CAR_VCO2N/P bits (Group 4, APR 33).
After reset, both complementary pairs are active. Externally, these
signals are added together in the analog integrator. The CAR_VCO2P/N
outputs should be weighted with a different factor with respect to the
CAR_VCO1P/N outputs by proper selection of the corresponding resis-
tors and capacitors. With two pairs of loop-filter outputs, you can adjust
the loop bandwidth over a large range of data rates by enabling one or
the other of the output pairs.
5.6.2.3 Low Baud Rate Operation
For low-baud-rate operation (between one and five Mbaud), the Sigma-
Delta conversion used in the carrier loop introduces a delay that makes
the carrier loop too narrow for reliable operation.
For this type of application, program the CAR_OUT_SEL bit (Group 4,
APR 33) so that the L64704 Carrier Loop pins carry the Phase Error
Detector to DAC (CAR_PED[5:0]) outputs instead of the CAR_VCOxP/N
outputs. The CAR_PED signal is simply the digital signal before Sigma-
Delta conversion. It is intended to be connected to an external 6-bit DAC,
that then feeds a similar active low-pass filter as described previously.
You program the L64704 to output the SCLK signal on the DVALIDOUT
pin by setting the SYNC/SCLK bit (Group 4, APR 14) to 1. The SCLK
signal on the DVALIDOUT pin is used to clock the external DAC.
You should set the CAR_PED_SEL bit to 1 to enable the CAR_PED[5:0]
outputs. You also need to feed the voltage level from the DAC’s output to
a loop filter similar to one of the filters shown in
Figure
5.10.
For low bit rate applications that use an external DAC, you must enable
both Sigma-Delta outputs by setting Carrier Loop Configuration Register
(Group 4, APR 33) bits [5:4] to zero.
The output of the DAC interface, CAR_PED[5:0] is in offset binary format.
A value of ‘000000’ produces a decrease in the VCO control voltage. A
value of ‘111111’ produces an increase in the VCO control voltage. The
value ‘100000’ is the zero control voltage.
5-20
Demodulator Module Functional Description