L64704 LSI Logic Corporation, L64704 Datasheet - Page 145
L64704
Manufacturer Part Number
L64704
Description
Satellite Decoder Technical Manual 5/97
Manufacturer
LSI Logic Corporation
Datasheet
1.L64704.pdf
(220 pages)
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7.1
Viterbi Decoder
Module
Chapter 7
The FEC Decoder
Pipeline
This chapter discusses the DEC Decoder Pipeline. The decoder pipeline
consists of four modules that are connected in a logical sequence. This
chapter discusses the four modules in the pipeline in five sections:
The Viterbi Decoder contains the following major modules:
The block diagram in
modules to the other.
Section 7.1, “Viterbi Decoder Module,”
L64704’s Viterbi Decoder module.
Section 7.2, “Deinterleaver Module,”
module.
Section 7.3, “Reed-Solomon Decoder,”
Reed-Solomon Decoder.
Section 7.4, “Descrambler Module Architecture and Operation,”
provides details on the Descrambler module.
Section 7.5, “FEC Module Software Reset”
FEC_Reset bit.
A depuncturing module for code rates other than 1/2
A 1/2 code rate Viterbi decoder core that computes the serial output
data stream given two sets of soft decision data input streams
A synchronization monitoring block to provide information on
acquisition or loss of synchronization
A bit error rate monitoring block
A control module
Figure 7.1
shows the relation of each of these
describes the Deinterleaver
provides details on the
discusses the L64704’s
describes the use of the
7-1
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