L64704 LSI Logic Corporation, L64704 Datasheet - Page 42
L64704
Manufacturer Part Number
L64704
Description
Satellite Decoder Technical Manual 5/97
Manufacturer
LSI Logic Corporation
Datasheet
1.L64704.pdf
(220 pages)
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3.3
Group 0, 1
Address Pointer
Register
3-10
The Address Pointer Register (APR) is a 13-bit R/W register that points
to the registers in Groups 2, 3, and 4. It is accessed when A[2:0] =000
and 001
must initialize the APR with the address of the first register entry that you
are going to read or write. The APR automatically increments after
reading or writing a byte within a Group 2, 3, or 4 register (A[2:0] = 010
011
Two consecutive writes are required to load the complete APR. The first
write is to Group 0 to load the eight LSBs, the second to Group 1 to load
the five MSBs. The APR can be read as well as written.
The unused bits in these registers are reserved for LSI internal test
procedures and future expansion and should always be set to zero.
To access a Group 3 or 4 register:
When you are through, the APR will automatically point to the next
register in the group.
L64704 Registers
Group 1, Data Bus D[7:0]
12
7
Unused
2
Place the address of the lower byte of the register that you need to
address into the APR.
Read or write the lower byte of the register using the Group 3
register address (0x011) or Group 4 register address (0x100).
If the register is a 16-bit register, just perform another read or write
to the group register address to access the second byte. The APR
increments automatically.
or 100
2
. Before accessing a register location from Group 2, 3, or 4, you
5
2
).
4
Address Pointer, APR[12:0]
APR[12:8]
0
Group 0, Data Bus D[7:0]
7
APR[7:0]
0
0
2
2
,
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