MAX1981A Maxim Integrated Products, MAX1981A Datasheet - Page 34

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MAX1981A

Manufacturer Part Number
MAX1981A
Description
(MAX1907A / MAX1981A) Quick-PWM Master Controllers
Manufacturer
Maxim Integrated Products
Datasheet

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Quick-PWM Master Controllers for Voltage-
Positioned CPU Core Power Supplies (IMVP-IV)
In non-CPU applications, the output capacitor’s size
often depends on how much ESR is needed to maintain
an acceptable level of output ripple voltage. The output
ripple voltage of a step-down controller equals the total
inductor ripple current multiplied by the output capaci-
tor’s ESR. When operating multiphase systems out-of-
phase, the peak inductor currents of each phase are
staggered, resulting in lower output ripple voltage by
reducing the total inductor ripple current. For out-of-
phase operation, the maximum ESR to meet ripple
requirements is:
The previous equation can be rewritten as the single-
phase ripple current minus a correction due to the
additional phases:
where t
phase on-times, η is the number of phases, and K is
from Table 3. When operating in-phase, the high-side
MOSFETs turn on together, so the output capacitors
must simultaneously support the combined inductor
ripple currents of each phase. For in-phase operation,
the maximum ESR to meet ripple requirements is:
The actual capacitance value required relates to the
physical size needed to achieve low ESR, as well as to
the chemistry of the capacitor technology. Thus, the
capacitor is usually selected by ESR and voltage rating
rather than by capacitance value (this is true of tanta-
lums, OS-CONs, and other electrolytics).
When using low-capacity filter capacitors such as
ceramic or polymer types, capacitor size is usually
determined by the capacity needed to prevent V
34
R
R
ESR
ESR
______________________________________________________________________________________
TRIG
I
L
LOAD MAX
η
R
R
is the propagation delay between the multi-
ESR
ESR
(
V
IN
I
)
LOAD MAX
f
LIR
SW
η
f L
SW
V
V
η
OUT
RIPPLE
(
η η 1
(
V
V
V
)
V
V
RIPPLE
RIPPLE
LIR
OUT
V
RIPPLE
IN
V
OUT
)
IN
V
(
OUT
V
L
IN
(
η 1
V
(
OUT
t
ON
)
V
OUT TRIG
)
+
t
TRIG
t
)
SAG
and V
sients. Generally, once enough capacitance is added to
meet the overshoot requirement, undershoot at the ris-
ing load edge is no longer a problem (see the V
V
For Quick-PWM controllers, stability is determined by
the value of the ESR zero relative to the switching fre-
quency. The boundary of instability is given by the fol-
lowing equation:
For a standard 300kHz application, the ESR zero fre-
quency must be well below 95kHz, preferably below
50kHz. Tantalum, Sanyo POSCAP, and Panasonic SP
capacitors, in widespread use at the time of publica-
tion, have typical ESR zero frequencies below 30kHz.
In the standard application used for inductor selection,
the ESR needed to support a 30mV
30mV/(40A
SP (type XR) capacitors in parallel provide 2mΩ (max)
ESR. Their typical combined ESR results in a zero at
48kHz.
Do not put high-value ceramic capacitors directly
across the output without taking precautions to ensure
stability. Ceramic capacitors have a high-ESR zero fre-
quency and can cause erratic, unstable operation.
However, it is easy to add enough series resistance by
placing the capacitors a couple of inches downstream
from the junction of the inductor and FB pin.
Unstable operation manifests itself in two related but
distinctly different ways: double-pulsing and feedback
loop instability. Double-pulsing occurs due to noise on
the output or because the ESR is so low that there is
not enough voltage ramp in the output voltage signal.
This “fools” the error comparator into triggering a new
cycle immediately after the minimum off-time period
has expired. Double-pulsing is more annoying than
harmful, resulting in nothing worse than increased out-
put ripple. However, it can indicate the possible pres-
ence of loop instability due to insufficient ESR. Loop
instability can result in oscillations at the output after
line or load steps. Such perturbations are usually
damped, but can cause the output voltage to rise
above or fall below the tolerance limits.
SOAR
Output Capacitor Stability Considerations
SOAR
equations in the Transient Response section).
from causing problems during load tran-
where f
0.3) = 2.5mΩ. Five 330µF/2.5V Panasonic
ESR
f
ESR
=
2
π
f
SW
π
R
ESR OUT
1
C
P-P
ripple is
SAG
and

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