MAX1981A Maxim Integrated Products, MAX1981A Datasheet - Page 35

• Manufacturer Part Number: MAX1981A
• Description: (MAX1907A / MAX1981A) Quick-PWM Master Controllers
• Manufacturer: Maxim Integrated Products

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The easiest method for checking stability is to apply a
very fast zero-to-max load transient and carefully
observe the output-voltage-ripple envelope for over-
shoot and ringing. It can help to simultaneously monitor
the inductor current with an AC current probe. Do not
allow more than one cycle of ringing after the initial
step-response under/overshoot.
The input capacitor must meet the ripple current
requirement (I
The multi-phase slave controllers operate out-of-phase,
staggering the turn-on times of each phase. This mini-
mizes the input ripple current by dividing the load cur-
rent among independent phases:
for out-of-phase operation.
When operating the multiphase system in-phase, the
high-side MOSFETs turn on simultaneously, so input
capacitors must support the combined input ripple cur-
rents of each phase:
for in-phase operation.
For most applications, nontantalum chemistries (ceram-
ic, aluminum, or OS-CON) are preferred due to their
resistance to inrush surge currents typical of systems
with a mechanical switch or connector in series with the
input. If the MAX1907A/MAX1981A are operated as the
second stage of a two-stage power-conversion system,
tantalum input capacitors are acceptable. In either con-
figuration, choose an input capacitor that exhibits less
than +10°C temperature rise at the RMS input current
for optimal circuit longevity.
Most of the following MOSFET guidelines focus on the
challenge of obtaining high load-current capability
when using high-voltage (>20V) AC adapters. Low-cur-
rent applications usually require less attention.
The high-side MOSFET (N
the resistive losses plus the switching losses at both
V
IN(MIN)
Positioned CPU Core Power Supplies (IMVP-IV)
I
RMS
and V
I
RMS
Quick-PWM Master Controllers for Voltage-
=
RMS
⎛
⎜
⎝
IN(MAX)
I
LOAD
=
η
I
) imposed by the switching currents.
LOAD
______________________________________________________________________________________
⎞
⎟
⎠
Input Capacitor Selection
Power MOSFET Selection
. Calculate both of these sums.
⎛
⎜
⎜
⎜
⎝
⎛
⎜
⎜
⎝
η
V
H
V
OUT
) must be able to dissipate
OUT IN
(
V
V
(
IN
IN
V
V
IN
−
V
−
OUT
η
V
OUT
)
⎞
⎟
⎟
⎠
)
⎞
⎟
⎟
⎟
⎠
Ideally, the losses at V
to losses at V
the losses at V
losses at V
Conversely, if the losses at V
higher than the losses at V
the size of N
the minimum power dissipation occurs where the resis-
tive losses equal the switching losses.
Choose a low-side MOSFET that has the lowest possi-
ble on-resistance (R
sized package (i.e., one or two 8-pin SOs, DPAK or
D
DL gate driver can supply sufficient current to support
the gate charge and the current injected into the para-
sitic gate-to-drain capacitor caused by the high-side
MOSFET turning on; otherwise, cross-conduction prob-
lems can occur.
Worst-case conduction losses occur at the duty factor
extremes. For the high-side MOSFET (N
case power dissipation due to resistance occurs at the
minimum input voltage:
Generally, a small high-side MOSFET is desired to
reduce switching losses at high input voltages. However,
the R
pation often limits how small the MOSFET can be. Again,
the optimum occurs when the switching losses equal the
conduction (R
do not usually become an issue until the input is greater
than approximately 15V.
Calculating the power dissipation in high-side MOSFETs
(N
allow for difficult quantifying factors that influence the
turn-on and turn-off times. These factors include the
internal gate resistance, gate charge, threshold voltage,
source inductance, and PC board layout characteristics.
The following switching-loss calculation provides only a
very rough estimate and is no substitute for breadboard
evaluation, preferably including verification using a ther-
mocouple mounted on N
2
H
PAK), and is reasonably priced. Make sure that the
) due to switching losses is difficult since it must
DS(ON)
PD N Switching
PD N
(
(
IN(MAX)
H
H
required to stay within package power dissi-
H
Re
DS(ON)
IN(MAX)
. If V
IN(MIN)
sistive
, consider increasing the size of N
IN
MOSFET Power Dissipation
) losses. High-side switching losses
, with lower losses in between. If
does not vary over a wide range,
DS(ON)
)
)
IN(MIN)
are significantly higher than the
=
=
H
(
:
⎛
⎜
⎝
V
V
IN MAX
V
OUT
IN(MIN)
(
IN
), comes in a moderate-
should be roughly equal
IN(MAX)
⎞
⎟
⎠
)
⎛
⎜
⎝
)
I
GATE
2
I
LOAD
, consider reducing
C
η
RSS SW LOAD
η
are significantly
⎞
⎟
⎠
f I
2
H
R
), the worst-
DS ON
(
)
35
H
.