MAX1981A Maxim Integrated Products, MAX1981A Datasheet - Page 40

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MAX1981A

Manufacturer Part Number
MAX1981A
Description
(MAX1907A / MAX1981A) Quick-PWM Master Controllers
Manufacturer
Maxim Integrated Products
Datasheet

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Quick-PWM Master Controllers for Voltage-
Positioned CPU Core Power Supplies (IMVP-IV)
4) Keep the power traces and load connections short.
5) Keep the high-current, gate-driver traces (DL, DH,
6) CSP, CSN, OAIN+, and OAIN- connections for cur-
7) When trade-offs in trace lengths must be made, it is
8) Route high-speed switching nodes away from sen-
1) Place the power components first, with ground ter-
40
the master to the analog ground in the slave to pre-
vent ground offsets. A low value (≤10Ω) resistor is
sufficient to link the two grounds.
This is essential for high efficiency. The use of thick
copper PC boards (2oz vs. 1oz) can enhance full-
load efficiency by 1% or more. Correctly routing PC
board traces is a difficult task that must be
approached in terms of fractions of centimeters,
where 1mΩ of excess trace resistance causes a
measurable efficiency penalty.
LX, and BST) short and wide to minimize trace
resistance and inductance. This is essential for
high-power MOSFETs that require low-impedance
gate drivers to avoid shoot-through currents.
rent limiting and voltage positioning must be made
using Kelvin sense connections to guarantee the
current-sense accuracy.
preferable to allow the inductor charging path to be
made longer than the discharge path. For example,
it is better to allow some extra distance between the
input capacitors and the high-side MOSFET than to
allow distance between the inductor and the low-
side MOSFET or between the inductor and the out-
put filter capacitor.
sitive analog areas (REF, COMP, ILIM, CSP, CSN,
etc.). Make all pin-strap control input connections
(SHDN, ILIM, B0–B2, S0–S2, TON) to analog
ground or V
minals adjacent (low-side MOSFET source, C
C
connections on the top layer with wide, copper-
filled areas.
______________________________________________________________________________________
OUT
, and D1 anode). If possible, make all these
CC
rather than power ground or V
Layout Procedure
DD
.
IN
,
2) Mount the controller IC adjacent to the low-side
3) Group the gate-drive components (BST diode and
4) Make the DC-DC controller ground connections as
5) Connect the output power planes (V
TRANSISTOR COUNT: 8713
PROCESS: BiCMOS
MOSFET. The DL gate trace must be short and
wide (50mils to 100mils wide if the MOSFET is 1
inch from the controller IC).
capacitor, V
controller IC.
shown in Figure 1. This diagram can be viewed as
having four separate ground planes: input/output
ground (where all the high-power components go),
the power ground plane (where the PGND pin and
V
ground plane (where sensitive analog components
such as the master’s GND pin and V
capacitor go), and the slave’s analog ground plane
(where the slave’s GND pin and V
capacitor go). The master’s GND plane must meet
the PGND plane only at a single point directly
beneath the IC. Similarly, the slave’s GND plane
must meet the PGND plane only at a single point
directly beneath the IC. The respective master and
slave ground planes should connect to the high-
power output ground with a short metal trace from
PGND to the source of the low-side MOSFET (the
middle of the star ground). This point must also be
very close to the output capacitor ground terminal.
tem ground planes) directly to the output filter
capacitor positive and negative terminals with multi-
ple vias. Place the entire DC-DC converter circuit
as close to the CPU as is practical.
DD
bypass capacitor go), the master’s analog
DD
bypass capacitor) together near the
Chip Information
CORE
CC
CC
and sys-
bypass
bypass

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