MAX1981A Maxim Integrated Products, MAX1981A Datasheet - Page 37

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MAX1981A

Manufacturer Part Number
MAX1981A
Description
(MAX1907A / MAX1981A) Quick-PWM Master Controllers
Manufacturer
Maxim Integrated Products
Datasheet

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The voltage-positioned circuit determines the load current
from the voltage across the current-sense resistors
(R
and output capacitors, as shown in Figure 8. The voltage
drop may be determined by the following equation:
where η is the number of phases summed together.
When the slave controller is disabled, the current-sense
summation maintains the proper voltage-positioned
slope. Select the positive input-summing resistors using
the following equation:
Powering new mobile processors requires careful
attention to detail to reduce cost, size, and power dissi-
pation. As CPUs became more power hungry, it was
recognized that even the fastest DC-DC converters
were inadequate to handle the transient power require-
ments. After a load transient, the output instantly
changes by ESR
converters respond by regulating the output voltage
back to its nominal state after the load transient occurs
(Figure 9). However, the CPU only requires that the out-
put voltage remain above a specified minimum value.
Dynamically positioning the output voltage to this lower
limit allows the use of fewer output capacitors and
reduces power consumption under load.
For a conventional (non-voltage-positioned) circuit, the
total voltage change is:
where V
Setting the converter to regulate at a lower voltage
when under load allows a larger voltage step when the
output current suddenly decreases (Figure 9). So the
total voltage change for a voltage-positioned circuit is:
SENSE
Positioned CPU Core Power Supplies (IMVP-IV)
V
V
P-P1
P-P2
= R
= 2
= 2
SAG
V
V
CM
Quick-PWM Master Controllers for Voltage-
VPS
VPS
and V
(ESR
(ESR
= R
Applications Information
=
=
COUT
______________________________________________________________________________________
CS
COUT
COUT
1
R
η
1
SOAR
+
A
) connected between the inductors
+
η
R
= R
R
R
R
B
Voltage Positioning and
B
F
F
ΔI
B
ΔI
ΔI
LOAD
are defined in Figure 10.
I
LOAD SENSE
||(ηR
LOAD
LOAD
I
Effective Efficiency
LOAD
η
. Conventional DC-DC
F
R
)
) + V
) + V
R
SENSE
SAG
SAG
+ V
+ V
SOAR
SOAR
where V
Procedure section. Since the amplitudes are the same
for both circuits (V
circuit tolerates twice the ESR. Since the ESR specifica-
tion is achieved by paralleling several capacitors, fewer
units are needed for the voltage-positioned circuit.
An additional benefit of voltage positioning is reduced
power consumption at high load currents. Since the
output voltage is lower under load, the CPU draws less
current. The result is lower power dissipation in the
CPU, although some extra power is dissipated in
R
46.7mΩ), reducing the output voltage 7.1% gives an
output voltage of 1.3V and an output current of 27.8A.
Given these values, CPU power consumption is
reduced from 42W to 36.1W. The additional power con-
sumption of R
which results in an overall power savings of:
In effect, 5.9W of CPU dissipation is saved and the
power supply dissipates much of the savings, but both
the net savings and the transfer of dissipation away
from the hot CPU are beneficial. Effective efficiency is
defined as the efficiency required of a non-voltage-
positioned circuit to equal the total dissipation of a volt-
age-positioned circuit for a given CPU operating
condition.
Figure 9. Voltage Positioning the Output
SENSE
. For a nominal 1.4V, 30A output (R
SAG
1.4V
1.4V
42W - (36.1W + 1.16W) = 4.7W.
SENSE
and V
1.5mΩ
VOLTAGE POSITIONING THE OUTPUT
A. CONVENTIONAL CONVERTER (50mV/div)
B. VOLTAGE-POSITIONED OUTPUT (50mV/div)
P-P1
is:
SOAR
= V
(27.8A)
P-P2
are defined in the Design
2
), the voltage-positioned
= 1.16W,
A
B
LOAD
37
=

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