AT91M40400-25C ATMEL Corporation, AT91M40400-25C Datasheet - Page 13

• Manufacturer Part Number: AT91M40400-25C
• Description: 16/32-bit Microcontroller, 2.7V to 3.6V Operating Range
• Manufacturer: ATMEL Corporation

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Figure 11 shows how to connect a 16-bit device with byte
and half word access (e.g. 16-bit SRAM) on NCS2.
Figure 11. Connection for a 16-Bit Data Bus with byte and
half word access
Figure 12 shows how to connect a 16-bit device without
byte access (e.g. Flash) on NCS2.
Figure 12. Connection for a 16-Bit Data Bus Without Byte
Write Capability.
EBI
The signal NWR0/NWE is used as NWE and enables
writing for byte or half word.
The signal NRD/NOE is used as NOE and enables
reading for byte or half word.
EBI
D8 - D15
A1 - A19
D8 - D15
A1 - A19
D0 - D7
D0 - D7
NCS2
NWE
NCS2
NOE
NUB
NLB
NWE
NOE
NUB
NLB
D0 - D7
D8 - D15
A0 - A18
Write Enable
Output Enable
Memory Enable
D0 - D7
D8 - D15
A0 - A18
Low Byte Enable
High Byte Enable
Write Enable
Output Enable
Memory Enable
Boot
Conventional program operation requires RAM memory at
page zero to support dynamic exception vectors. However
it is necessary to boot from non-volatile memory at page
zero.
When the AT91M40400 is reset, the memory map is modi-
fied to place NVM at page zero. The on-chip RAM is
remapped to address 0x00300000 and either on-chip 32-bit
NVM or off-chip 8/16-bit NVM is remapped to address
0x00000000. The off-chip NVM is selected on NCS0.
The Boot memory type is selected by the BMS pin when
NRST is active (see Boot Mode Select on page 8). Watch-
dog reset does not change the Boot memory selection but
does perform a full reboot from the previously selected
memory.
The memory map is returned to its conventional configura-
tion by writing 1 to the RCB bit of the EBI_RCR (Remap
Control Register). This cancels the remapping and enables
normal operation of the EBI, as programmed (see
page 33). It is not possible to remap the memory by writing
0 to the RCB bit in EBI_RCR.
During Boot the number of external devices (number of
active chip selects) and their configurations must be pro-
grammed as described in the EBI User Interface (see
page 30). The chip select addresses which are pro-
grammed take effect when memory remapping is can-
celled. Only NCS0 is active while the memory is remapped.
Wait states take effect immediately when they are pro-
grammed to allow Boot program execution to be optimized.
AT91M40400
13