AT91M40400-25C ATMEL Corporation, AT91M40400-25C Datasheet - Page 9

• Manufacturer Part Number: AT91M40400-25C
• Description: 16/32-bit Microcontroller, 2.7V to 3.6V Operating Range
• Manufacturer: ATMEL Corporation

EBI: External Bus Interface
The EBI generates the signals which control the access to
the external memory or peripheral devices. The EBI is fully
programmable and can address up to 64M bytes. It has
eight chip selects and a 24-bit address bus, the upper four
bits of which are multiplexed with a chip select.
The 16-bit data bus can be configured to interface with 8-
or 16-bit external devices. Separate read and write control
signals allow for direct memory and peripheral interfacing.
The EBI supports different access protocols allowing single
clock cycle memory accesses.
The main features are:
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The EBI User Interface is described on page 30.
Figure 5. External Memory Smaller than Page Size
External Memory Mapping
Up to 8 chip select lines
8- or 16-bit data bus
Byte write or byte select lines
Remap of boot memory
Two different read protocols
Programmable wait state generation
External wait request
Programmable data float time
Memory
Map
1M byte device
1M byte device
1M byte device
1M byte device
Low
Low
Low
Low
Hi
Hi
Hi
Hi
External Memory Mapping
The memory map associates the internal 32-bit address
space with the external 24-bit address bus.
The memory map is defined by programming the base
address and page size of the external memories (see EBI
User Interface registers EBI_CSR0 to EBI_CSR7). Note
that A0-A23 is only significant for 8-bit memory; A1-A23 is
used for 16-bit memory.
If the physical memory device is smaller than the pro-
grammed page size, it wraps around and appears to be
repeated within the page. The EBI correctly handles any
valid access to the memory device within the page (see
Figure 5).
In the event of an access request to an address outside
any programmed page, an Abort signal is generated. Two
types of Abort are possible: instruction prefetch abort and
data abort. The corresponding exception vector addresses
are respectively 0x0000000C and 0x00000010. It is up to
the system programmer to program the error handling rou-
tine to use in case of an Abort (see the ARM7TDMI
Datasheet for further information).
Base + 4M byte
Base + 3M byte
Base + 2M byte
Base + 1M byte
Base
Repeat 3
Repeat 2
Repeat 1
AT91M40400
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