ADSP-21367 Analog Devices, ADSP-21367 Datasheet - Page 3

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ADSP-21367

Manufacturer Part Number
ADSP-21367
Description
SHARC Processor
Manufacturer
Analog Devices
Datasheet

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Preliminary Technical Data
TABLE OF CONTENTS
Summary ............................................................... 1
General Description ................................................. 4
Key Features – Processor Core ................................. 2
Input/Output Features ........................................... 2
Dedicated Audio Components ................................. 2
ADSP-21367 Family Core Architecture ...................... 4
ADSP-21367 Memory ............................................ 6
External Memory .................................................. 6
ADSP-21367 Input/Output Features .......................... 7
System Design ...................................................... 9
Development Tools .............................................. 10
Additional Information ......................................... 11
SIMD Computational Engine ............................... 4
Independent, Parallel Computation Units ................ 4
Data Register File ............................................... 5
Single-Cycle Fetch of Instruction and Four Operands . 5
Instruction Cache .............................................. 5
Data Address Generators With Zero-Overhead Hardware
Flexible Instruction Set ....................................... 6
On-Chip Memory .............................................. 6
SDRAM Controller ............................................ 7
Asynchronous Controller .................................... 7
DMA Controller ................................................ 7
Digital Audio Interface (DAI) ............................... 7
Serial Ports ....................................................... 8
S/PDIF Compatible Digital Audio Receiver/Transmitter
Digital Peripheral Interface (DPI) .......................... 8
Serial Peripheral (Compatible) Interface .................. 8
UART Port ...................................................... 8
Timers ............................................................ 9
Two Wire Interface Port (TWI) ............................. 9
Pulse Width Modulation ..................................... 9
ROM Based Security ........................................... 9
Program Booting .............................................. 10
Power Supplies ................................................. 10
Target Board JTAG Emulator Connector ................ 10
Designing an Emulator-Compatible DSP
Evaluation Kit .................................................. 11
Circular Buffer Support .................................... 5
and Synchronous/Asynchronous Sample
Rate Converter ............................................... 8
Board (Target) .............................................. 11
Rev. PrA | Page 3 of 48 | November 2004
Pin Function Descriptions ........................................ 12
ADSP-21367 Specifications ....................................... 15
Ordering Guide ..................................................... 45
Address Data Modes ............................................ 14
Boot Modes ....................................................... 14
Core Instruction Rate to CLKIN Ratio Modes ............ 14
Recommended Operating Conditions ...................... 15
Electrical Characteristics ....................................... 15
Absolute Maximum Ratings ................................... 16
ESD Sensitivity ................................................... 16
Timing Specifications ........................................... 16
Output Drive Currents ......................................... 42
Test Conditions .................................................. 42
Capacitive Loading .............................................. 42
Thermal Characteristics ........................................ 43
Power-Up Sequencing ....................................... 18
Clock Input .................................................... 19
Clock Signals ................................................... 19
Reset ............................................................. 20
Interrupts ....................................................... 20
Core Timer ..................................................... 21
Timer PWM_OUT Cycle Timing ......................... 21
Timer WDTH_CAP Timing ............................... 22
DAI and DPI Pin to Pin Direct Routing ................. 22
Precision Clock Generator (Direct Pin Routing) ...... 23
Flags ............................................................. 24
SDRAM Interface Timing .................................. 25
External Port Bus Request and Grant Cycle Timing .. 26
Serial Ports ..................................................... 27
Input Data Port ............................................... 30
Parallel Data Acquisition Port (PDAP) .................. 31
Sample Rate Converter—Serial Input Port .............. 32
Sample Rate Converter—Serial Output Port ........... 33
SPDIF Transmitter ........................................... 34
SPDIF Receiver ................................................ 36
SPI Interface—Master ....................................... 38
SPI Interface—Slave .......................................... 39
Universal Asynchronous Receiver-Transmitter
JTAG Test Access Port and Emulation .................. 41
(UART) Port—Receive and Transmit Timing ...... 40
ADSP-21367

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