LPC47M112 SMSC Corporation, LPC47M112 Datasheet - Page 15
![no-image](/images/no-image-200.jpg)
LPC47M112
Manufacturer Part Number
LPC47M112
Description
ENHANCED SUPER I/O CONTROLLER WITH LPC INTERFACE
Manufacturer
SMSC Corporation
Datasheet
1.LPC47M112.pdf
(208 pages)
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Enhanced Super I/O Controller with LPC Interface
Datasheet
4
SMSC DS – LPC47M112
BLOCK DIAGRAM
LPC Bus
Signals
SER_IRQ
PCI_CLK
INTERFACE
V
LPC BUS
TR
SERIAL
IRQ
Vcc Vss
32KHz
CLK32
nIO_SMI
CLOCK
GEN
SMI
CLOCKI
14MHz
FIGURE 1 - LPC47M112 BLOCK DIAGRAM
PME
nIO_PME
nDSKCHG
nWRPRT
nWGATE
BLOCK
nINDEX
nTRK0
ACPI
ADDRESS BUS
PROPRIETARY
CONTROLLER
FLOPPYDISK
COMPATIBLE
VERTICAL
SMSC
CORE
82077
DATASHEET
DENSEL
nHDSEL
nSTEP
nDIR
Game Port Signals*
CONFIGURATION
CONTROL BUS
REGISTERS
Game Port
(1-Dual)
DATA BUS
DRVDEN0
DRVDEN1
nMTR0
nDS0
WCLOCK
RCLOCK
WDATA
RDATA
...
*
nWDATA
SEPARATOR
WITH WRITE
Page 15
PENSATION
PRECOM-
DIGITAL
DATA
FAN1*
nRDATA
FAN2*
Control
Fan
FAN_TACH1*
FAN_TACH2*
*
Denotes Multifunction Pins
PORT 2 WITH
MULTI-MODE
COMPATIBLE
COMPATIBLE
PARALLEL
GENERAL
PURPOSE
INFRARED
MPU-401
SERIAL
PORT 1
16C550
16C550
SERIAL
SERIAL
PORT
8042
PORT
MUX
I/O
MIDI_OUT
BUSY, SLCT, PE,
nSTB, nSLCTIN,
MIDI_IN
KCLK
KDATA
MCLK
MDATA
GATEA20, KRESET
nERROR, nACK
nINIT, nALF
nDSR1, nDCD1, nRI1, nDTR1
IRRX2, IRTX2
TXD2(IRTX), nCTS2, nRTS2
RXD2(IRRX)
nDSR2, nDCD2, nRI2, nDTR2
PD0-7
GP1[0:7]*
GP2[0:2,4:7]*
GP3[0:7]*, GP4[0:3]*
GP5[0:7]*, GP6[0:1]*
TXD1, nCTS1, nRTS1
RXD1
*
*
*
Rev. 02/02/2005
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