LPC47M112 SMSC Corporation, LPC47M112 Datasheet - Page 154
![no-image](/images/no-image-200.jpg)
LPC47M112
Manufacturer Part Number
LPC47M112
Description
ENHANCED SUPER I/O CONTROLLER WITH LPC INTERFACE
Manufacturer
SMSC Corporation
Datasheet
1.LPC47M112.pdf
(208 pages)
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Enhanced Super I/O Controller with LPC Interface
Datasheet
SMSC DS – LPC47M112
GP57
Default = 0x01
on VTR POR
GP60
Default = 0x01
on VTR POR
GP61
Default = 0x01
on VTR POR
N/A
N/A
GP1
Default = 0x00
on VTR POR
GP2
Default = 0x00
on VTR POR
NAME
REG OFFSET
(R/W)
(R/W)
(R/W)
(R/W)
(R/W)
(hex)
(R)
(R)
4A
4B
4C
46
47
48
49
General Purpose I/0 bit 5.7
Bit[0] In/Out : =1 Input, =0 Output
Bit[1] Polarity : =1 Invert, =0 No Invert
Bit[3:2] Alternate Function Select
11=Reserved
10=Reserved
01=nDTR2
00=GPIO
Bits[6:4] Reserved
Bit[7] Output Type Select
1=Open Drain
0=Push Pull
General Purpose I/0 bit 6.0
Bit[0] In/Out : =1 Input, =0 Output
Bit[1] Polarity : =1 Invert, =0 No Invert
Bit[3:2] Alternate Function Select
11=Reserved
10=Either Edge Triggered Interrupt Input 4 (Note 1),
01=LED1
00=GPIO
Bits[6:4] Reserved
Bit[7] Output Type Select
1=Open Drain
0=Push Pull
General Purpose I/0 bit 6.1
Bit[0] In/Out : =1 Input, =0 Output
Bit[1] Polarity : =1 Invert, =0 No Invert
Bit[3:2] Alternate Function Select
11=Reserved
10=Either Edge Triggered Interrupt Input 5 (Note 1), (Eng.
Note 3)
01=LED2
00=GPIO
Bits[6:4] Reserved
Bit[7] Output Type Select
1=Open Drain
0=Push Pull
Reserved – reads return 0
Reserved – reads return 0
General Purpose I/0 Data Register 1
Bit[0] GP10
Bit[1] GP11
Bit[2] GP12
Bit[3] GP13
Bit[4] GP14
Bit[5] GP15
Bit[6] GP16
Bit[7] GP17
General Purpose I/0 Data Register 2
Bit[0] GP20
Bit[1] GP21
Bit[2] GP22
Bit[3] Reserved
Bit[4] GP24
Bit[5] GP25
Bit[6] GP26
Bit[7] GP27
Page 154
DESCRIPTION
Rev. 02/02/2005
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