LPC47M112 SMSC Corporation, LPC47M112 Datasheet - Page 174

• Manufacturer Part Number: LPC47M112
• Description: ENHANCED SUPER I/O CONTROLLER WITH LPC INTERFACE
• Manufacturer: SMSC Corporation

Enhanced Super I/O Controller with LPC Interface
Datasheet
SMSC DS – LPC47M112
FDD0
Default = 0x00
on VCC POR,
VTR POR and
HARD RESET
FDD1
PP Mode Register
Default = 0x3C
on VCC POR,
VTR POR and
HARD RESET
PP Mode Register 2
Default = 0x00
on VCC POR,
VTR POR and
HARD RESET
NAME
NAME
Table 69 - Parallel Port, Logical Device 3 [Logical Device Number = 0x03]
REG INDEX
REG INDEX
0xF4 R/W
0xF5 R/W
0xF0 R/W
0xF1 R/W
Bits[1:0] Drive Type Select: DT1, DT0
Bits[2]
Bits[4:3] Data Rate Table Select: DRT1, DRT0
Bits[5]
Bits[6]
Bits[7]
Refer to definition and default for 0xF4
Bits[2:0] Parallel Port Mode
= 100
= 000
= 001
= 101
= 010
= 011
= 111
Bit[6:3] ECP FIFO Threshold
0111b (default)
Bit[7] PP Interrupt Type
Not valid when the parallel port is in the Printer
Mode (100) or the Standard & Bi-directional Mode
(000).
= 1
= 0
IRQ level type when the parallel port is in ECP, TEST,
or Centronics FIFO Mode.
Bits[3:0] Reserved. Set to zero
Bit [4] TIMEOUT_SELECT
= 0
= 1
Bits[7:5] Reserved. Set to zero.
=0 Use Precompensation
=1 No Precompensation
Read as 0 (read only)
Read as 0 (read only)
Precompensation Disable PTS
Read as 0 (read only)
Printer Mode (default)
Standard and Bi-directional (SPP) Mode
EPP-1.9 and SPP Mode
EPP-1.7 and SPP Mode
ECP Mode
ECP and EPP-1.9 Mode
ECP and EPP-1.7 Mode
Pulsed Low, released to high-Z.
IRQ follows nACK when parallel port in EPP
Mode or [Printer, SPP, EPP] under ECP.
TMOUT (EPP Status Reg.) cleared on write of
‘1’ to TMOUT.
TMOUT cleared on trailing edge of read of
EPP Status Reg.
Page 174
DEFINITION
DEFINITION
STATE
STATE
C
C
C
Rev. 02/02/2005