MPC8358E Freescale Semiconductor, MPC8358E Datasheet - Page 90
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MPC8358E
Manufacturer Part Number
MPC8358E
Description
(MPC8358E / MPC8360E) PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8358E.pdf
(112 pages)
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Clocking
In addition, some of the internal units may be required to be shut off or operate at lower frequency than
the csb_clk frequency. Those units have a default clock ratio that can be configured by a memory mapped
register after the device comes out of reset.
frequency.
Table 69
conditions (see
Maximum operating frequencies depend on the part ordered, see
Addressed by this Document”
authorized distributor for more information.
1
2
3
4
5
90
e300 core frequency ( core_clk )
Coherent system bus frequency
( csb_clk )
QUICC Engine frequency
( ce_clk )
DDR and DDR2 memory bus frequency
(MCLK)
Local bus frequency
(LCLK n )
PCI input frequency (CLKIN or PCI_CLK)
Security core maximum internal operating frequency
MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2
LCLK[0:2], and core_clk frequencies do not exceed their respective maximum or minimum operating frequencies.
csb_clk frequency (depending on RCWL[LBCM]).
The CLKIN frequency, RCWL[SPMF], and RCWL[COREPLL] settings must be chosen such that the resulting csb_clk , MCLK,
The 667 MHz core frequency is based on a 1.3 V V
The 500 MHz QE frequency is based on a 1.3 V V
The DDR data rate is 2x the DDR memory bus frequency.
The local bus frequency is 1/2, 1/4, or 1/8 of the lb_clk frequency (depending on LCCR[CLKDIV]) which is in turn 1x or 2x the
4
5
provides the operating frequencies for the TBGA package under recommended operating
Table
1
Characteristic
Security Core
PCI and DMA complex
with limitation, only for slow csb_clk rates, up to 166MHz
2). All frequency combinations shown in the table below may not be available.
3
Table 69. Operating Frequencies for the TBGA Package
Unit
1
for part ordering details and contact your Freescale Sales Representative or
Table 68. Configurable Clock Units
Table 68
DD
DD
Frequency
csb_clk
supply voltage.
Default
supply voltage.
csb_clk
400 MHz
266–400
specifies which units have a configurable clock
133
/3
Off,
csb_clk
Off,
csb_clk
csb_clk
Section 26.1, “Part Numbers Fully
/3
100–166.67
16.67–133
25–66.67
533 MHz
266–533
133–333
266–500
133
1
Options
, csb_clk
/2,
667 MHz
Freescale Semiconductor
266–667
166
2
MHz
MHz
MHz
MHz
MHz
MHz
MHz
Unit