MPC8358E Freescale Semiconductor, MPC8358E Datasheet - Page 92
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MPC8358E
Manufacturer Part Number
MPC8358E
Description
(MPC8358E / MPC8360E) PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8358E.pdf
(112 pages)
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Clocking
As described in
configuration word low and the CFG_CLKIN_DIV configuration input signal select the ratio between the
primary clock input (CLKIN or PCI_CLK) and the internal coherent system bus clock (csb_clk).
shows the expected frequency values for the CSB frequency for select csb_clk to CLKIN/PCI_SYNC_IN
ratios.
92
MPC8360E/MPC8358E PowerQUICC™ II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 2
System VCO Frequency = csb_clk × VCO divider
CFG_CLKIN_DIV
at reset
Section 22,
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
1
“Clocking,” the LBCM, DDRCM, and SPMF parameters in the reset
SPMF
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
0000
Table 72. CSB Frequency Options
Input Clock
csb_clk :
Ratio
10 : 1
11 : 1
12 : 1
13 : 1
14 : 1
15 : 1
16 : 1
2 : 1
3 : 1
4 : 1
5 : 1
6 : 1
7 : 1
8 : 1
9 : 1
2
100
116
133
150
166
183
200
216
16.67
233
250
266
Input Clock Frequency (MHz)
csb_clk Frequency (MHz)
100
125
150
175
200
225
250
275
300
325
25
33.33
100
133
166
200
233
266
300
333
Freescale Semiconductor
66.67
2
133
200
266
333
Table 72