16F84A Microchip Technology, 16F84A Datasheet - Page 15

• Manufacturer Part Number: 16F84A
• Description: 18-pin Enhanced Flash/EEPROM 8-Bit Microcontroller
• Manufacturer: Microchip Technology

3.2
PORTB is an 8-bit wide bi-directional port. The corre-
sponding data direction register is TRISB. Setting a
TRISB bit (=1) will make the corresponding PORTB pin
an input, i.e., put the corresponding output driver in a
hi-impedance mode. Clearing a TRISB bit (=0) will
make the corresponding PORTB pin an output, i.e., put
the contents of the output latch on the selected pin.
EXAMPLE 3-1:
BCF
CLRF
BSF
MOVLW
MOVWF
Each of the PORTB pins has a weak internal pull-up. A
single control bit can turn on all the pull-ups. This is per-
formed by clearing bit RBPU (OPTION<7>). The weak
pull-up is automatically turned off when the port pin is
configured as an output. The pull-ups are disabled on a
Power-on Reset.
FIGURE 3-3:
Set RBIF
Data bus
WR TRIS
WR Port
RBPU
1998 Microchip Technology Inc.
Note 1: TRISB = '1' enables weak pull-up
(1)
STATUS, RP0
PORTB
STATUS, RP0
0xCF
TRISB
2: I/O pins have diode protection to V
PORTB and TRISB Registers
From other
RB7:RB4 pins
(if RBPU = '0' in the OPTION_REG register).
BLOCK DIAGRAM OF PINS
RB7:RB4
Data Latch
TRIS Latch
RD TRIS
RD Port
INITIALIZING PORTB
D
D
CK
CK
;
; Initialize PORTB by
; clearing output
; data latches
; Select Bank 1
; Value used to
; initialize data
; direction
; Set RB<3:0> as inputs
; RB<5:4> as outputs
; RB<7:6> as inputs
Q
Q
Q
Q
Latch
EN
DD
EN
D
D
and V
RD Port
V
SS
P
DD
.
weak
pull-up
TTL
Input
Buffer
pin
I/O
Preliminary
(2)
Four of PORTB’s pins, RB7:RB4, have an interrupt on
change feature. Only pins configured as inputs can
cause this interrupt to occur (i.e. any RB7:RB4 pin con-
figured as an output is excluded from the interrupt on
change comparison). The input pins (of RB7:RB4) are
compared with the old value latched on the last read of
PORTB. The “mismatch” outputs of RB7:RB4 are
OR’ed together to generate the RB Port Change Inter-
rupt with flag bit RBIF (INTCON<0>).
This interrupt can wake the device from SLEEP. The
user, in the interrupt service routine, can clear the inter-
rupt in the following manner:
a)
b)
A mismatch condition will continue to set flag bit RBIF.
Reading PORTB will end the mismatch condition, and
allow flag bit RBIF to be cleared.
The interrupt on change feature is recommended for
wake-up on key depression operation and operations
where PORTB is only used for the interrupt on change
feature. Polling of PORTB is not recommended while
using the interrupt on change feature.
FIGURE 3-4:
Data bus
WR TRIS
WR Port
RBPU
RB0/INT
Note 1: TRISB = '1' enables weak pull-up
Any read or write of PORTB. This will end the
mismatch condition.
Clear flag bit RBIF.
(1)
2: I/O pins have diode protection to V
(if RBPU = '0' in the OPTION_REG register).
BLOCK DIAGRAM OF PINS
RB3:RB0
RD TRIS
RD Port
Data Latch
TRIS Latch
D
D
CK
CK
Schmitt Trigger
Buffer
PIC16F84A
Q
Q
Q
DD
DS35007A-page 15
EN
and V
TTL
Input
Buffer
D
SS
V
P
.
RD Port
DD
weak
pull-up
pin
I/O
(2)