16F84A Microchip Technology, 16F84A Datasheet - Page 30

• Manufacturer Part Number: 16F84A
• Description: 18-pin Enhanced Flash/EEPROM 8-Bit Microcontroller
• Manufacturer: Microchip Technology

PIC16F84A
6.10
The Watchdog Timer is a free running on-chip RC
oscillator which does not require any external
components. This RC oscillator is separate from the
RC oscillator of the OSC1/CLKIN pin. That means that
the WDT will run even if the clock on the OSC1/CLKIN
and OSC2/CLKOUT pins of the device has been
stopped, for example, by execution of a SLEEP
instruction. During normal operation a WDT time-out
generates a device RESET. If the device is in SLEEP
mode, a WDT Wake-up causes the device to wake-up
and continue with normal operation. The WDT can be
permanently disabled by programming configuration bit
WDTE as a '0' (Section 6.1).
6.10.1
The WDT has a nominal time-out period of 18 ms, (with
no prescaler). The time-out periods vary with
temperature, V
FIGURE 6-12: WATCHDOG TIMER BLOCK DIAGRAM
TABLE 6-7
DS35007A-page 30
2007h
81h
Legend: x = unknown. Shaded cells are not used by the WDT.
Note 1: See Figure 6-1 for operation of the PWRTE bit.
Addr
Note: PSA and PS2:PS0 are bits in the OPTION_REG register.
2: See Figure 6-1 and Section 6.12 for operation of the Code and Data protection bits.
Name
Config. bits
OPTION_REG
Watchdog Timer (WDT)
WDT PERIOD
DD
SUMMARY OF REGISTERS ASSOCIATED WITH THE WATCHDOG TIMER
and process variations from part to
RBPU
Bit 7
(2)
WDT Timer
Enable Bit
WDT
INTEDG
Bit 6
(2)
From TMR0 Clock Source
(Figure 4-2)
T0CS
Bit 5
(2)
•
0
1
PSA
T0SE
Bit 4
M
(2)
U
X
Preliminary
PWRTE
Bit 3
PSA
part (see DC specs). If longer time-out periods are
desired, a prescaler with a division ratio of up to 1:128
can be assigned to the WDT under software control by
writing to the OPTION_REG register. Thus, time-out
periods up to 2.3 seconds can be realized.
The CLRWDT and SLEEP instructions clear the WDT
and the postscaler (if assigned to the WDT) and pre-
vent it from timing out and generating a device
RESET condition.
The TO bit in the STATUS register will be cleared upon
a WDT time-out.
6.10.2
It should also be taken into account that under worst
case conditions (V
WDT prescaler) it may take several seconds before a
WDT time-out occurs.
(1)
0
Time-out
MUX
8 - to -1 MUX
WDT
WDTE
Postscaler
Bit 2
PS2
WDT PROGRAMMING CONSIDERATIONS
•
1
8
FOSC1
Bit 1
PS1
DD
PSA
To TMR0 (Figure 4-2)
= Min., Temperature = Max., max.
FOSC0
Bit 0
PS0
1998 Microchip Technology Inc.
PS2:PS0
1111 1111
Power-on
Value on
Reset
(2)
other resets
Value on all
1111 1111