ST72F264G ST Microelectronics, ST72F264G Datasheet - Page 24

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ST72F264G

Manufacturer Part Number
ST72F264G
Description
(ST72F260G - ST72F264G) 8-BIT MCU
Manufacturer
ST Microelectronics
Datasheet

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DataSheet
ST72260G, ST72262G, ST72264G
6.4 SYSTEM INTEGRITY MANAGEMENT (SI)
The System Integrity Management block contains
group the Low voltage Detector (LVD), Auxiliary
Voltage Detector (AVD) and Clock Security Sys-
tem (CSS) functions. It is managed by the SICSR
register.
6.4.1 Low Voltage Detector (LVD)
The Low Voltage Detector function (LVD) gener-
ates a static reset when the V
below a V
secures the power-up as well as the power-down
keeping the ST7 in reset.
The V
than the V
to avoid a parasitic reset when the MCU starts run-
ning and sinks current on the supply (hysteresis).
The LVD Reset circuitry generates a reset when
V
The LVD function is illustrated in
Figure 14. Low Voltage Detector vs Reset
24/171
DD
– V
– V
RESET
4
is below:
IT-
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U
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V
V
reference value for a voltage drop is lower
when V
when V
IT-
IT+
IT+
IT-
reference value for power-on in order
reference value. This means that it
V
DD
DD
DD
is falling
is rising
DD
supply voltage is
Figure
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14.
The voltage threshold can be configured by option
byte to be low, medium or high.
Provided the minimum V
the oscillator frequency) is above V
can only be in two modes:
In these conditions, secure operation is always en-
sured for the application without the need for ex-
ternal reset hardware.
During a Low Voltage Detector Reset, the RESET
pin is held low, thus permitting the MCU to reset
other devices.
Notes:
The LVD allows the device to be used without any
external RESET circuitry.
The LVD is an optional function which can be se-
lected by option byte.
V
– under full software control
– in static safe reset
hys
DD
value (guaranteed for
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