ST72F264G ST Microelectronics, ST72F264G Datasheet - Page 39

• Manufacturer Part Number: ST72F264G
• Description: (ST72F260G - ST72F264G) 8-BIT MCU
• Manufacturer: ST Microelectronics

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DataSheet
I/O PORTS (Cont’d)
Figure 28. I/O Port General Block Diagram
Table 7. I/O Port Mode Options
Legend: NI - not implemented
Input
Output
REGISTER
ACCESS
EXTERNAL
INTERRUPT
REQUEST (ei
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Off - implemented not activated
On - implemented and activated
DDR SEL
OR SEL
DR SEL
Floating with/without Interrupt
Pull-up with/without Interrupt
Push-pull
Open Drain (logic level)
True Open Drain
Configuration Mode
DDR
DR
OR
x
)
SENSITIVITY
SELECTION
ALTERNATE
OUTPUT
From on-chip periphera
ALTERNATE
ENABLE
BIT
If implemented
1
0
Combinational
Logic
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l
1
0
FROM
OTHER
BITS
Pull-Up
Note: Refer to the Port Configuration
table for device specific information.
Off
On
Off
NI
Note: The diode to V
true open drain pads. A local protection between
the pad and V
vice against positive stress.
N-BUFFER
PULL-UP
CONDITION
P-Buffer
ST72260G, ST72262G, ST72264G
Off
On
Off
NI
OL
SCHMITT
TRIGGER
CMOS
is implemented to protect the de-
V
DD
DD
NI (see note)
is not implemented in the
to V
On
DD
P-BUFFER
(see table below)
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To on-chip peripheral
V
Diodes
DD
DIODES
(see table below)
PULL-UP
(see table below)
ALTERNATE
ANALOG
INPUT
to V
INPUT
PAD
On
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