ST14C02C ST Microelectronics, ST14C02C Datasheet
ST14C02C
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ST14C02C Summary of contents
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... Serial Clock MODE Write Mode V Supply Voltage CC GND Ground DS.ST14C02C/9811V2 2 Kbit (256 x 8) Serial I2C Bus EEPROM Micromodule (D15) fabricated with 2 C standard. Figure 1. Logic Diagram 2 C bus MODE ST14C02C Memory Card IC Micromodule (D20) Wafer V CC SCL ST14C02C GND SDA AI01162 1/12 ...
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... ST14C02C Figure 2. D15 Contact Connections V CC SCL The memory behaves as a slave device in the I protocol, with all memory operations synchronized by the serial clock. Read and write operations are initiated by a START condition, generated by the bus master. The START condition is followed by the Device Select Code which is composed of a stream of 7 bits (1010000), plus one read/write bit (R/W) and is terminated by an acknowledge bit ...
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... On the D15 micromodule, the MODE pin is not . (Figure 4 in- CC connected to a contact. This pin is left floating on the silicon. This type of ST14C02C is always in its MultiByte mode, and cannot be changed from this. DEVICE OPERATION The memory device supports the I summarized in Figure 5. Any device that sends ...
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... ST14C02C 2 Figure Bus Protocol SCL SDA START CONDITION SCL MSB SDA START CONDITION 1 SCL MSB SDA Start Condition START is identified by a high to low transition of the SDA line while the clock, SCL, is stable in the high state. A START condition must precede any data transfer command ...
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... ms. Writing more than four bytes in the Multi- ACK DEV SEL BYTE ADDR R/W ACK DEV SEL BYTE ADDR R/W ACK ACK DATA IN N ST14C02C as shown in Table 5. The Multibyte IH, W ACK ACK DATA IN ACK ACK DATA IN 1 DATA IN 2 AI01941 ...
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... ST14C02C Table 5. Operating Modes Mode Current Address Read Random Address Read Sequential Read Byte Write Multibyte Write Page Write Note byte Write mode may modify data bytes in an ad- jacent row. (Each row is 8 bytes long). However, the Multibyte Write can properly write up to eight ...
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... Figure 7. Write Cycle Polling Flowchart using ACK First byte of instruction with already decoded by ST14C02C NO ReSTART STOP Table 6. AC Measurement Conditions Input Rise and Fall Times Input Pulse Voltages Input and Output Timing Reference Voltages 1 Table 7. Capacitance ( ° 100 kHz) ...
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... ST14C02C Figure 9. Read Mode Sequences CURRENT ADDRESS READ RANDOM ADDRESS READ SEQUENTIAL CURRENT READ SEQUENTIAL RANDOM READ Sequential Read This mode can be initiated with either a Current Address Read or a Random Address Read. How- ever, in this case the master does acknowledge the data byte output, and the memory continues to output the next byte in sequence ...
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... SDA in Hi-Z OUT CC 100 kHz c CC (Rise/Fall time < ST14C02C ST14C02C Unit Min Max 1 µs 300 ns 1 µs 300 ns 4.7 µs 4 µs 4 µs 0 µs 4.7 µs 250 ns 4.0 µs 4.7 µs 3.5 µ ...
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... ST14C02C Figure 10. AC Waveforms SCL SDA IN START CONDITION SCL tCLQV SDA OUT SCL SDA IN tCHDH STOP CONDITION ORDERING INFORMATION Devices are shipped from the factory with the memory content set at all ‘1’s (FFh). The notation used for the device number is as shown in Table 10 ...
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... Table 10. Ordering Information Scheme Example: Figure 11. Sawing Orientation GND ORIENTATION 1 ST14C02C - D20 where “x” indicates the sawing orientation, as follows (and as shown in Figure 11) VIEW: WAFER FRONT SIDE GND GND 2 Delivery Form D15 Module on Super 35 mm film D20 Module on Super 35 mm film W2 Unsawn wafer (275 m ± ...
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... ST14C02C Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice ...