ST14C02C ST Microelectronics, ST14C02C Datasheet - Page 4

• Manufacturer Part Number: ST14C02C
• Description: Memory Card IC 2 Kbit 256 x 8 Serial I2C Bus EEPROM
• Manufacturer: ST Microelectronics

ST14C02C
Figure 5. I
Start Condition
START is identified by a high to low transition of
the SDA line while the clock, SCL, is stable in the
high state. A START condition must precede any
data transfer command. The memory continuously
monitors (except during a programming cycle) the
SDA and SCL lines for a START condition, and will
not respond unless one is given.
Stop Condition
STOP is identified by a low to high transition of the
SDA line while the clock SCL is stable in the high
Table 4. Device Select Code
Note: 1. The most significant bit, b7, is sent first.
4/12
Device Select
SCL
SDA
SCL
SDA
SCL
SDA
2
C Bus Protocol
CONDITION
START
b7
CONDITION
1
START
MSB
1
MSB
1
1
b6
0
2
2
INPUT
b5
1
SDA
3
3
Device Code
CHANGE
SDA
b4
0
state. A STOP condition terminates communica-
tion between the memory and the bus master. A
STOP condition at the end of a Read command
forces the memory device into its standby state. A
STOP condition at the end of a Write command
triggers the internal EEPROM write cycle.
Acknowledge Bit (ACK)
An acknowledge signal is used to indicate a suc-
cessful data transfer. The bus transmitter, either
master or slave, will release the SDA bus after
sending 8 bits of data. During the 9
7
7
b3
0
8
8
b2
0
ACK
9
ACK
CONDITION
9
STOP
CONDITION
STOP
b1
0
AI00792
th
clock pulse
RW
RW
b0