ST14C02C ST Microelectronics, ST14C02C Datasheet - Page 3

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ST14C02C

Manufacturer Part Number
ST14C02C
Description
Memory Card IC 2 Kbit 256 x 8 Serial I2C Bus EEPROM
Manufacturer
ST Microelectronics
Datasheet

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Part Number
Manufacturer
Quantity
Price
Part Number:
ST14C02C
Manufacturer:
BOSCH
Quantity:
400
Table 3. Endurance and Data Retention
SIGNAL DESCRIPTION
Serial Clock (SCL)
The SCL input pin is used to synchronize all data
in and out of the memory. A pull up resistor can be
connected from the SCL line to V
dicates how the value of the pull-up resistor can be
calculated).
Serial Data (SDA)
The SDA pin is bi-directional, and is used to trans-
fer data in or out of the memory. It is an open drain
output that may be wire-OR’ed with other open
drain or open collector signals on the bus. A pull
up resistor must be connected from the SDA bus
to V
pull-up resistor can be calculated).
Mode (MODE)
The MODE input may be driven dynamically. It
must be held at:
Figure 4. Maximum R
ST14C02C
V
V
V
IL
IH
IL
Device
CC
or V
for Page Write mode
for Multibyte Write mode
. (Figure 4 indicates how the value of the
20
16
12
IH
8
4
0
for the Byte Write mode
V CC = 5V
100
L
Value versus Bus Capacitance (C
C BUS (pF)
Endurance (Erase/Write Cycles)
200
CC
. (Figure 4 in-
1,000,000
300
400
When unconnected, the MODE input is internally
read as a V
voltages are CMOS levels, and are not TTL com-
patible.
On the D15 micromodule, the MODE pin is not
connected to a contact. This pin is left floating on
the silicon. This type of ST14C02C is always in its
MultiByte mode, and cannot be changed from this.
DEVICE OPERATION
The memory device supports the I
summarized in Figure 5. Any device that sends
data on to the bus is defined to be a transmitter,
and any device that reads the data to be a receiv-
er. The device that controls the data transfer is
known as the master, and the other as the slave.
A data transfer can only be initiated by the master,
which will also provide the serial clock for synchro-
nization. The memory device is always a slave de-
vice in all communication.
BUS
MASTER
) for an I
V CC
IH
(Multibyte Write mode). Note that the
SDA
SCL
2
C Bus
Data Retention (Years)
R L
C BUS
10
R L
2
C protocol, as
C BUS
ST14C02C
AI01100
3/12

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