ACS-I1024-CPGA Photon Vision Systems, Inc., ACS-I1024-CPGA Datasheet - Page 9

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ACS-I1024-CPGA

Manufacturer Part Number
ACS-I1024-CPGA
Description
High Performance Area CMOS Image Sensor
Manufacturer
Photon Vision Systems, Inc.
Datasheet
100
101
102
103
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
ADD3
ADD4
CLK_IN_2X
CLK1X
__________
N_ACTIVE
_________
N_FRAME
DIG_PAD_PWR_3.3
DIG_PAD_GND_3.3
DIG_DATA_ENA
DATA_0_LSB
DATA_1
DATA_2
DATA_3
DATA_4
DATA_5
DATA_6
DATA_7
DATA_8
DATA_9
REG_DATA_0
REG_DATA_1
REG_DATA_2
REG_DATA_3
REG_DATA_4
Product DATASHEET ACS-I XXX Rev. 10/31/00 Subject to change without notice. Page 9 of 26
Digital Input
Setup Register Address
Bit 3.
Digital Input
Setup Register Address
Bit 4 - MSB.
Digital Input
Master Clock
Digital Output
Pixel Clock
Digital Output
Row video Valid
Digital Output
Frame Valid
Digital Pad Power for
Digital Video
3.3 OR 5.0 VDC
Ground for
DIG_PAD_3.3
Ground
Digital Input
Digital video Data
enable.
Tri-state Output
Digitized video Bit 0
LSB
Tri-state Output
Digitized video Bit 1
Tri-state Output
Digitized video Bit 2
Tri-state Output
Digitized video Bit 3
Tri-state Output
Digitized video Bit 4
Tri-state Output
Digitized video Bit 5
Tri-state Output
Digitized video Bit 6
Tri-state Output
Digitized video Bit 7
Tri-state Output
Digitized video Bit 8
Tri-state Output
Digitized video Bit 9
Bi-directional I/O
See pins 54, 55
Bi-directional I/O
See pins 54, 55
Bi-directional I/O
See pins 54, 55
Bi-directional I/O
See pins 54, 55
Bi-directional I/O
See pins 54, 55
Photon Vision Systems, Inc. 1999, 2000
Setup register address bit 3. Address bus for access to the SETUP REGISTERS. See
pins 54-55, 99-103, and 1-7.
Setup register address bit 4. Address bus for access to the SETUP REGISTERS. See
pins 54-55, 99-103, and 1-7.
Input for Master Clock, must be 2X desired pixel read rate.
Output Pixel Clock Rate. Note that this pin is referenced to pin 87.
Output goes low when an active line of video is output. Note that this pin is referenced
to pin 87.
Output goes low when an active frame of video is output. Note that this pin is
referenced to pin 87.
Power select for digital video and control lines, pins 83-98. If 5.0 VDC signal levels
are desired for these pins, then input 5.0 VDC. If 3.3 VDC signal levels are desired,
then input 3.3 VDC here.
Ground in for power supply used for pin 86.
When ON, the on-chip A/D is enabled, and digital video is output. When enabled, do
not connect the analog output (see pin 71). When OFF, the DATA lines, pins 89-98
are tri-stated. This features allows imagers to be cascaded. When OFF and using the
analog output, do not connect the digital video lines, pins 89-98.
When pin 88 is ON, digital video is output as Bit 0, LSB. When pin 88 is OFF, this
output is tri-stated.
Do not connect this pin if using analog video out, pin 69.
When pin 88 is ON, digital video is output as Bit 1. When pin 88 is OFF, this output is
tri-stated.
Do not connect this pin if using analog video out, pin 69.
When pin 88 is ON, digital video is output as Bit 2. When pin 88 is OFF, this output is
tri-stated.
Do not connect this pin if using analog video out, pin 69.
When pin 88 is ON, digital video is output as Bit 3. When pin 88 is OFF, this output is
tri-stated.
Do not connect this pin if using analog video out, pin 69.
When pin 88 is ON, digital video is output as Bit 4. When pin 88 is OFF, this output is
tri-stated.
Do not connect this pin if using analog video out, pin 69.
When pin 88 is ON, digital video is output as Bit 5. When pin 88 is OFF, this output is
tri-stated.
Do not connect this pin if using analog video out, pin 69.
When pin 88 is ON, digital video is output as Bit 6. When pin 88 is OFF, this output is
tri-stated.
Do not connect this pin if using analog video out, pin 69.
When pin 88 is ON, digital video is output as Bit 7. When pin 88 is OFF, this output is
tri-stated.
Do not connect this pin if using analog video out, pin 69.
When pin 88 is ON, digital video is output as Bit 8. When pin 88 is OFF, this output is
tri-stated.
Do not connect this pin if using analog video out, pin 69.
When pin 88 is ON, digital video is output as Bit 9. When pin 88 is OFF, this output is
tri-stated.
Do not connect this pin if using analog video out, pin 69.
Setup Register data bit 0, LSB.
See Register setup table for more information
Setup Register data bit 1.
See Register setup table for more information
Setup Register data bit 2.
See Register setup table for more information
Setup Register data bit 3.
See Register setup table for more information
Setup Register data bit 4, MSB.
See Register setup table for more information
PRELIMINARY

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