LM3S1150-IQC50-A1 Luminary Micro, Inc., LM3S1150-IQC50-A1 Datasheet - Page 42

• Manufacturer Part Number: LM3S1150-IQC50-A1
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

Interrupts
42
a. 0 is the default priority for all the settable priorities.
Table 4-2. Interrupts
Exception Type
Debug Monitor
-
PendSV
SysTick
Interrupts
Interrupt (Bit in Interrupt Registers)
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10
12
13
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
11
0
1
2
3
4
5
6
7
8
9
Position
16 and
above
12
13
14
15
Priority
settable
settable
settable
settable
Description
GPIO Port A
GPIO Port B
GPIO Port C
GPIO Port D
GPIO Port E
UART0
UART1
SSI0
I2C0
PWM Fault
PWM Generator 0
PWM Generator 1
PWM Generator 2
QEI0
Watchdog timer
Timer0 A
Timer0 B
Timer1 A
Timer1 B
Timer2 A
Timer2 B
Analog Comparator 0
Analog Comparator 1
Analog Comparator 2
System Control
Flash Control
GPIO Port F
GPIO Port G
GPIO Port H
UART2
-
a
Description
Debug monitor (when not halting). This is synchronous, but only active
when enabled. It does not activate if lower priority than the current
activation.
Reserved.
Pendable request for system service. This is asynchronous and only
pended by software.
System tick timer has fired. This is asynchronous.
Asserted from outside the ARM Cortex-M3 core and fed through the NVIC
(prioritized). These are all asynchronous. Table 4-2 on page 42 lists the
interrupts on the LM3S1150 controller.
June 14, 2007