LM3S1150-IQC50-A1 Luminary Micro, Inc., LM3S1150-IQC50-A1 Datasheet - Page 5

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LM3S1150-IQC50-A1

Manufacturer Part Number
LM3S1150-IQC50-A1
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
10.2
10.2.1 GPTM Reset Conditions .......................................................................................................... 196
10.2.2 32-Bit Timer Operating Modes .................................................................................................. 196
10.2.3 16-Bit Timer Operating Modes .................................................................................................. 198
10.3
10.3.1 32-Bit One-Shot/Periodic Timer Mode ....................................................................................... 202
10.3.2 32-Bit Real-Time Clock (RTC) Mode ......................................................................................... 203
10.3.3 16-Bit One-Shot/Periodic Timer Mode ....................................................................................... 203
10.3.4 16-Bit Input Edge Count Mode ................................................................................................. 204
10.3.5 16-Bit Input Edge Timing Mode ................................................................................................ 204
10.3.6 16-Bit PWM Mode ................................................................................................................... 205
10.4
10.5
11
11.1
11.2
11.3
11.4
11.5
12
12.1
12.2
12.2.1 Transmit/Receive Logic ........................................................................................................... 252
12.2.2 Baud-Rate Generation ............................................................................................................. 253
12.2.3 Data Transmission .................................................................................................................. 254
12.2.4 Serial IR (SIR) ......................................................................................................................... 254
12.2.5 FIFO Operation ....................................................................................................................... 255
12.2.6 Interrupts ................................................................................................................................ 255
12.2.7 Loopback Operation ................................................................................................................ 256
12.2.8 IrDA SIR block ........................................................................................................................ 256
12.3
12.4
12.5
13
13.1
13.2
13.2.1 Bit Rate Generation ................................................................................................................. 292
13.2.2 FIFO Operation ....................................................................................................................... 292
13.2.3 Interrupts ................................................................................................................................ 292
13.2.4 Frame Formats ....................................................................................................................... 293
13.3
13.4
13.5
14
14.1
14.2
14.2.1 I
June 14, 2007
Functional Description ............................................................................................................. 196
Initialization and Configuration ................................................................................................. 202
Register Map .......................................................................................................................... 205
Register Descriptions .............................................................................................................. 206
Watchdog Timer ............................................................................................................... 228
Block Diagram ........................................................................................................................ 228
Functional Description ............................................................................................................. 228
Initialization and Configuration ................................................................................................. 229
Register Map .......................................................................................................................... 229
Register Descriptions .............................................................................................................. 230
UART ................................................................................................................................. 251
Block Diagram ........................................................................................................................ 252
Functional Description ............................................................................................................. 252
Initialization and Configuration ................................................................................................. 256
Register Map .......................................................................................................................... 257
Register Descriptions .............................................................................................................. 258
SSI ..................................................................................................................................... 291
Block Diagram ........................................................................................................................ 291
Functional Description ............................................................................................................. 292
Initialization and Configuration ................................................................................................. 300
Register Map .......................................................................................................................... 301
Register Descriptions .............................................................................................................. 302
Inter-Integrated Circuit (I
Block Diagram ........................................................................................................................ 326
Functional Description ............................................................................................................. 326
2
C Bus Functional Overview .................................................................................................... 327
Luminary Micro Confidential-Advance Product Information
2
C) Interface ............................................................................ 326
LM3S1150 Microcontroller
5

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