LM3S1150-IQC50-A1 Luminary Micro, Inc., LM3S1150-IQC50-A1 Datasheet - Page 62

• Manufacturer Part Number: LM3S1150-IQC50-A1
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

System Control
6.4
62
Offset
0x05C
0x034
0x040
0x044
0x048
0x050
0x054
0x058
0x060
0x064
0x070
0x100
0x104
0x108
0x120
0x124
0x128
0x144
0x110
0x114
0x118
Name
LDOPCTL
SRCR0
SRCR1
SRCR2
RIS
IMC
MISC
RESC
RCC
PLLCFG
RCC2
RCGC0
RCGC1
RCGC2
SCGC0
SCGC1
SCGC2
DCGC0
DCGC1
DCGC2
DSLPCLKCFG
Register Descriptions
All addresses given are relative to the System Control base address of 0x400F.E000.
Luminary Micro Confidential-Advance Product Information
R/W1C
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
0x07AE.3AD1
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0780.2800
0x0780.0000
0x00000000
0x00000000
0x00000000
0x00000040
0x00000000
0x00000000
0x00000040
0x00000000
0x00000000
0x00000040
0x00000000
0x00000000
Reset
-
-
Description
LDO Power Control
Software Reset Control 0
Software Reset Control 1
Software Reset Control 2
Raw Interrupt Status
Interrupt Mask Control
Masked Interrupt Status and Clear
Reset Cause
Run-Mode Clock Configuration
XTAL to PLL Translation
Run-Mode Clock Configuration 2
Run Mode Clock Gating Control Register 0
Run Mode Clock Gating Control Register 1
Run Mode Clock Gating Control Register 2
Sleep Mode Clock Gating Control Register 0
Sleep Mode Clock Gating Control Register 1
Sleep Mode Clock Gating Control Register 2
Deep Sleep Mode Clock Gating Control Register 0
Deep Sleep Mode Clock Gating Control Register 1
Deep Sleep Mode Clock Gating Control Register 2
Deep Sleep Clock Configuration
June 14, 2007
page
See
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103
105
100
107
66
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