LM3S1150-IQC50 Luminary Micro, Inc., LM3S1150-IQC50 Datasheet - Page 22

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LM3S1150-IQC50

Manufacturer Part Number
LM3S1150-IQC50
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet

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Manufacturer
Quantity
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Part Number:
LM3S1150-IQC50-A2
Manufacturer:
Texas Instruments
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Manufacturer:
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Architectural Overview
22
ARM FiRM-compliant Watchdog Timer
Synchronous Serial Interface (SSI)
UART
16-bit PWM mode
32-bit down counter with a programmable load register
Separate watchdog clock with an enable
Programmable interrupt generation logic with interrupt masking
Lock register protection from runaway software
Reset generation logic with an enable/disable
User-enabled stalling when the controller asserts the CPU Halt flag during debug
Two SSI modules, each with the following features:
Master or slave operation
Programmable clock bit rate and prescale
Separate transmit and receive FIFOs, 16 bits wide, 8 locations deep
Programmable interface operation for Freescale SPI, MICROWIRE, or Texas Instruments
synchronous serial interfaces
Programmable data frame size from 4 to 16 bits
Internal loopback test mode for diagnostic/debug testing
Three fully programmable 16C550-type UARTs with IrDA support
Separate 16x8 transmit (TX) and 16x12 receive (RX) FIFOs to reduce CPU interrupt service
loading
Programmable baud-rate generator with fractional divider
Programmable FIFO length, including 1-byte deep operation providing conventional
double-buffered interface
FIFO trigger levels of 1/8, ¼, ½, ¾, and 7/8
Standard asynchronous communication bits for start, stop, and parity
False-start-bit detection
Input edge count capture
Input edge time capture
Simple PWM mode with software-programmable output inversion of the PWM signal
Luminary Micro Confidential-Advance Product Information
June 14, 2007

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