LM3S1150-IQC50 Luminary Micro, Inc., LM3S1150-IQC50 Datasheet - Page 343
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LM3S1150-IQC50
Manufacturer Part Number
LM3S1150-IQC50
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
1.LM3S1150-IQC50.pdf
(471 pages)
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June 14, 2007
Table 14-3. Write Field Decoding for I2CMCS[3:0] Field (Sheet 1 of 3)
Current
State
Idle
Master
Transmit
I2CMSA[0]
All other combinations not listed are non-operations.
All other combinations not listed are non-operations.
R/S
X
X
X
0
0
1
1
1
1
0
0
1
1
1
1
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ACK
X
X
0
0
1
1
X
X
X
X
X
0
0
1
1
a
STOP
I2CMCS[3:0]
0
1
0
1
0
1
0
1
1
0
1
0
1
0
1
START
1
1
1
1
1
1
0
0
0
1
1
1
1
1
1
1
1
1
1
1
RUN
1
1
0
1
1
1
1
1
1
1
Description
START condition followed by SEND (master goes to the
Master Transmit state).
START condition followed by a SEND and STOP
condition (master remains in Idle state).
START condition followed by RECEIVE operation with
negative ACK (master goes to the Master Receive state).
START condition followed by RECEIVE and STOP
condition (master remains in Idle state).
START condition followed by RECEIVE (master goes to
the Master Receive state).
Illegal.
NOP.
SEND operation (master remains in Master Transmit
state).
STOP condition (master goes to Idle state).
SEND followed by STOP condition (master goes to Idle
state).
Repeated START condition followed by a SEND (master
remains in Master Transmit state).
Repeated START condition followed by SEND and STOP
condition (master goes to Idle state).
Repeated START condition followed by a RECEIVE
operation with a negative ACK (master goes to Master
Receive state).
Repeated START condition followed by a SEND and
STOP condition (master goes to Idle state).
Repeated START condition followed by RECEIVE (master
goes to Master Receive state).
Illegal.
NOP.
LM3S1150 Microcontroller
343
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